8330165: C2: make superword consistently use PhaseIdealLoop::register_new_node()
Reviewed-by: chagedorn, kvn
This commit is contained in:
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e073d5b374
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bfff02eef6
@ -456,7 +456,7 @@ Node* IdealLoopTree::reassociate(Node* n1, PhaseIdealLoop *phase) {
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}
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assert(result != nullptr, "");
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phase->register_new_node(result, phase->get_ctrl(n1));
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phase->register_new_node_with_ctrl_of(result, n1);
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phase->_igvn.replace_node(n1, result);
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assert(phase->get_loop(phase->get_ctrl(n1)) == this, "");
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_body.yank(n1);
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@ -2215,7 +2215,7 @@ void PhaseIdealLoop::do_unroll(IdealLoopTree *loop, Node_List &old_new, bool adj
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// Limit is not constant. Int subtraction could lead to underflow.
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// (1) Convert to long.
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Node* limit_l = new ConvI2LNode(limit);
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register_new_node(limit_l, get_ctrl(limit));
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register_new_node_with_ctrl_of(limit_l, limit);
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Node* stride_l = _igvn.longcon(stride_con);
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set_ctrl(stride_l, C->root());
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@ -1673,6 +1673,9 @@ public:
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void set_created_loop_node() { _created_loop_node = true; }
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bool created_loop_node() { return _created_loop_node; }
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void register_new_node(Node* n, Node* blk);
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void register_new_node_with_ctrl_of(Node* new_node, Node* ctrl_of) {
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register_new_node(new_node, get_ctrl(ctrl_of));
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}
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Node* clone_and_register(Node* n, Node* ctrl) {
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n = n->clone();
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@ -467,7 +467,7 @@ Node* PhaseIdealLoop::remix_address_expressions_add_left_shift(Node* n, IdealLoo
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Node* zero = _igvn.integercon(0, bt);
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set_ctrl(zero, C->root());
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Node* neg = SubNode::make(zero, add->in(2), bt);
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register_new_node(neg, get_ctrl(add->in(2)));
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register_new_node_with_ctrl_of(neg, add->in(2));
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add = AddNode::make(add->in(1), neg, bt);
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register_new_node(add, add_ctrl);
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}
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@ -654,13 +654,13 @@ Node *PhaseIdealLoop::convert_add_to_muladd(Node* n) {
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if ((adr1->in(AddPNode::Base) == adr3->in(AddPNode::Base)) &&
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(adr2->in(AddPNode::Base) == adr4->in(AddPNode::Base))) {
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nn = new MulAddS2INode(mul_in1, mul_in2, mul_in3, mul_in4);
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register_new_node(nn, get_ctrl(n));
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register_new_node_with_ctrl_of(nn, n);
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_igvn.replace_node(n, nn);
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return nn;
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} else if ((adr1->in(AddPNode::Base) == adr4->in(AddPNode::Base)) &&
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(adr2->in(AddPNode::Base) == adr3->in(AddPNode::Base))) {
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nn = new MulAddS2INode(mul_in1, mul_in2, mul_in4, mul_in3);
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register_new_node(nn, get_ctrl(n));
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register_new_node_with_ctrl_of(nn, n);
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_igvn.replace_node(n, nn);
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return nn;
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}
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@ -2268,7 +2268,7 @@ void PhaseIdealLoop::clone_loop_handle_data_uses(Node* old, Node_List &old_new,
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// that access. If that condition is replaced by an identical dominating one, then an unpinned load would risk
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// floating above its range check.
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pinned_clone->set_req(0, phi);
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register_new_node(pinned_clone, get_ctrl(use));
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register_new_node_with_ctrl_of(pinned_clone, use);
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_igvn.replace_node(use, pinned_clone);
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continue;
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}
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@ -3914,7 +3914,7 @@ bool PhaseIdealLoop::partial_peel( IdealLoopTree *loop, Node_List &old_new ) {
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// floating above its range check.
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Node* pinned_clone = n_clone->pin_array_access_node();
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if (pinned_clone != nullptr) {
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register_new_node(pinned_clone, get_ctrl(n_clone));
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register_new_node_with_ctrl_of(pinned_clone, n_clone);
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old_new.map(n->_idx, pinned_clone);
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_igvn.replace_node(n_clone, pinned_clone);
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n_clone = pinned_clone;
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@ -756,7 +756,7 @@ void PhaseIdealLoop::pin_array_access_nodes_dependent_on(Node* ctrl) {
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}
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Node* pinned_clone = use->pin_array_access_node();
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if (pinned_clone != nullptr) {
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register_new_node(pinned_clone, get_ctrl(use));
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register_new_node_with_ctrl_of(pinned_clone, use);
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_igvn.replace_node(use, pinned_clone);
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--i;
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}
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@ -33,6 +33,7 @@
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#include "opto/memnode.hpp"
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#include "opto/opcodes.hpp"
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#include "opto/opaquenode.hpp"
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#include "opto/rootnode.hpp"
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#include "opto/superword.hpp"
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#include "opto/vectornode.hpp"
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#include "opto/movenode.hpp"
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@ -2553,8 +2554,7 @@ bool SuperWord::output() {
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BasicType bt = velt_basic_type(cmp);
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const TypeVect* vt = TypeVect::make(bt, vlen);
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VectorNode* mask = new VectorMaskCmpNode(bol_test, cmp_in1, cmp_in2, bol_test_node, vt);
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igvn().register_new_node_with_optimizer(mask);
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phase()->set_ctrl(mask, phase()->get_ctrl(p->at(0)));
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phase()->register_new_node_with_ctrl_of(mask, p->at(0));
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igvn()._worklist.push(mask);
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// VectorBlend
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@ -2628,8 +2628,7 @@ bool SuperWord::output() {
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assert(n->req() == 2, "only one input expected");
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Node* in = vector_opd(p, 1);
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Node* longval = VectorNode::make(opc, in, nullptr, vlen, T_LONG);
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igvn().register_new_node_with_optimizer(longval);
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phase()->set_ctrl(longval, phase()->get_ctrl(first));
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phase()->register_new_node_with_ctrl_of(longval, first);
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vn = VectorCastNode::make(Op_VectorCastL2X, longval, T_INT, vlen);
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vlen_in_bytes = vn->as_Vector()->length_in_bytes();
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} else if (VectorNode::is_convert_opcode(opc)) {
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@ -2669,8 +2668,7 @@ bool SuperWord::output() {
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}
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#endif
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igvn().register_new_node_with_optimizer(vn);
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phase()->set_ctrl(vn, phase()->get_ctrl(first));
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phase()->register_new_node_with_ctrl_of(vn, first);
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for (uint j = 0; j < p->size(); j++) {
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Node* pm = p->at(j);
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igvn().replace_node(pm, vn);
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@ -2739,8 +2737,7 @@ Node* SuperWord::vector_opd(Node_List* p, int opd_idx) {
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const TypeVect* vt = TypeVect::make(iv_bt, vlen);
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Node* vn = new PopulateIndexNode(iv(), igvn().intcon(1), vt);
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VectorNode::trace_new_vector(vn, "SuperWord");
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igvn().register_new_node_with_optimizer(vn);
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phase()->set_ctrl(vn, phase()->get_ctrl(opd));
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phase()->register_new_node_with_ctrl_of(vn, opd);
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return vn;
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}
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@ -2760,16 +2757,14 @@ Node* SuperWord::vector_opd(Node_List* p, int opd_idx) {
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if (t != nullptr && t->is_con()) {
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juint shift = t->get_con();
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if (shift > mask) { // Unsigned cmp
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cnt = ConNode::make(TypeInt::make(shift & mask));
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igvn().register_new_node_with_optimizer(cnt);
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cnt = igvn().intcon(shift & mask);
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phase()->set_ctrl(cnt, phase()->C->root());
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}
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} else {
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if (t == nullptr || t->_lo < 0 || t->_hi > (int)mask) {
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cnt = ConNode::make(TypeInt::make(mask));
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igvn().register_new_node_with_optimizer(cnt);
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cnt = igvn().intcon(mask);
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cnt = new AndINode(opd, cnt);
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igvn().register_new_node_with_optimizer(cnt);
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phase()->set_ctrl(cnt, phase()->get_ctrl(opd));
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phase()->register_new_node_with_ctrl_of(cnt, opd);
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}
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if (!opd->bottom_type()->isa_int()) {
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assert(false, "int type only");
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@ -2778,8 +2773,7 @@ Node* SuperWord::vector_opd(Node_List* p, int opd_idx) {
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}
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// Move shift count into vector register.
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cnt = VectorNode::shift_count(p0->Opcode(), cnt, vlen, velt_basic_type(p0));
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igvn().register_new_node_with_optimizer(cnt);
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phase()->set_ctrl(cnt, phase()->get_ctrl(opd));
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phase()->register_new_node_with_ctrl_of(cnt, opd);
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return cnt;
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}
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if (opd->is_StoreVector()) {
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@ -2797,8 +2791,7 @@ Node* SuperWord::vector_opd(Node_List* p, int opd_idx) {
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if (p0->bottom_type()->isa_long()) {
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p0_t = TypeLong::LONG;
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conv = new ConvI2LNode(opd);
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igvn().register_new_node_with_optimizer(conv);
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phase()->set_ctrl(conv, phase()->get_ctrl(opd));
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phase()->register_new_node_with_ctrl_of(conv, opd);
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}
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vn = VectorNode::scalar2vector(conv, vlen, p0_t);
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} else {
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@ -2806,8 +2799,7 @@ Node* SuperWord::vector_opd(Node_List* p, int opd_idx) {
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vn = VectorNode::scalar2vector(opd, vlen, p0_t);
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}
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igvn().register_new_node_with_optimizer(vn);
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phase()->set_ctrl(vn, phase()->get_ctrl(opd));
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phase()->register_new_node_with_ctrl_of(vn, opd);
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VectorNode::trace_new_vector(vn, "SuperWord");
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return vn;
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}
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@ -2836,8 +2828,7 @@ Node* SuperWord::vector_opd(Node_List* p, int opd_idx) {
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pk->add_opd(in2);
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}
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}
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igvn().register_new_node_with_optimizer(pk);
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phase()->set_ctrl(pk, phase()->get_ctrl(opd));
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phase()->register_new_node_with_ctrl_of(pk, opd);
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VectorNode::trace_new_vector(pk, "SuperWord");
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return pk;
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}
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@ -3640,7 +3631,7 @@ void SuperWord::adjust_pre_loop_limit_to_align_main_loop_vectors() {
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// safe to simply convert invar to an int and loose the upper 32
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// bit half.
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invar = new ConvL2INode(invar);
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igvn().register_new_node_with_optimizer(invar);
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phase()->register_new_node(invar, pre_ctrl);
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TRACE_ALIGN_VECTOR_NODE(invar);
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}
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if (is_sub) {
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@ -3648,8 +3639,7 @@ void SuperWord::adjust_pre_loop_limit_to_align_main_loop_vectors() {
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} else {
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xboi = new AddINode(xboi, invar);
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}
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igvn().register_new_node_with_optimizer(xboi);
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phase()->set_ctrl(xboi, pre_ctrl);
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phase()->register_new_node(xboi, pre_ctrl);
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TRACE_ALIGN_VECTOR_NODE(xboi);
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}
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@ -3659,11 +3649,11 @@ void SuperWord::adjust_pre_loop_limit_to_align_main_loop_vectors() {
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// When the base() is top, we have no alignment guarantee at all.
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// Hence, we must now take the base into account for the calculation.
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Node* xbase = new CastP2XNode(nullptr, base);
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igvn().register_new_node_with_optimizer(xbase);
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phase()->register_new_node(xbase, pre_ctrl);
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TRACE_ALIGN_VECTOR_NODE(xbase);
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#ifdef _LP64
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xbase = new ConvL2INode(xbase);
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igvn().register_new_node_with_optimizer(xbase);
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phase()->register_new_node(xbase, pre_ctrl);
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TRACE_ALIGN_VECTOR_NODE(xbase);
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#endif
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if (is_sub) {
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@ -3671,8 +3661,7 @@ void SuperWord::adjust_pre_loop_limit_to_align_main_loop_vectors() {
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} else {
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xboi = new AddINode(xboi, xbase);
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}
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igvn().register_new_node_with_optimizer(xboi);
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phase()->set_ctrl(xboi, pre_ctrl);
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phase()->register_new_node(xboi, pre_ctrl);
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TRACE_ALIGN_VECTOR_NODE(xboi);
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}
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@ -3681,8 +3670,7 @@ void SuperWord::adjust_pre_loop_limit_to_align_main_loop_vectors() {
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// The division is executed as shift
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Node* log2_abs_scale = igvn().intcon(exact_log2(abs(scale)));
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Node* XBOI = new URShiftINode(xboi, log2_abs_scale);
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igvn().register_new_node_with_optimizer(XBOI);
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phase()->set_ctrl(XBOI, pre_ctrl);
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phase()->register_new_node(XBOI, pre_ctrl);
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TRACE_ALIGN_VECTOR_NODE(log2_abs_scale);
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TRACE_ALIGN_VECTOR_NODE(XBOI);
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@ -3696,8 +3684,7 @@ void SuperWord::adjust_pre_loop_limit_to_align_main_loop_vectors() {
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} else {
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XBOI_OP_old_limit = new AddINode(XBOI, old_limit);
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}
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igvn().register_new_node_with_optimizer(XBOI_OP_old_limit);
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phase()->set_ctrl(XBOI_OP_old_limit, pre_ctrl);
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phase()->register_new_node(XBOI_OP_old_limit, pre_ctrl);
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TRACE_ALIGN_VECTOR_NODE(XBOI_OP_old_limit);
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// 3.2: Compute:
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@ -3708,8 +3695,7 @@ void SuperWord::adjust_pre_loop_limit_to_align_main_loop_vectors() {
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// a bitmask operation.
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Node* mask_AW = igvn().intcon(AW-1);
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Node* adjust_pre_iter = new AndINode(XBOI_OP_old_limit, mask_AW);
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igvn().register_new_node_with_optimizer(adjust_pre_iter);
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phase()->set_ctrl(adjust_pre_iter, pre_ctrl);
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phase()->register_new_node(adjust_pre_iter, pre_ctrl);
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TRACE_ALIGN_VECTOR_NODE(mask_AW);
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TRACE_ALIGN_VECTOR_NODE(adjust_pre_iter);
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@ -3722,8 +3708,7 @@ void SuperWord::adjust_pre_loop_limit_to_align_main_loop_vectors() {
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} else {
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new_limit = new AddINode(old_limit, adjust_pre_iter);
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}
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igvn().register_new_node_with_optimizer(new_limit);
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phase()->set_ctrl(new_limit, pre_ctrl);
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phase()->register_new_node(new_limit, pre_ctrl);
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TRACE_ALIGN_VECTOR_NODE(new_limit);
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// 5: Compute (15a, b):
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@ -3731,8 +3716,7 @@ void SuperWord::adjust_pre_loop_limit_to_align_main_loop_vectors() {
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Node* constrained_limit =
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(stride > 0) ? (Node*) new MinINode(new_limit, orig_limit)
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: (Node*) new MaxINode(new_limit, orig_limit);
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igvn().register_new_node_with_optimizer(constrained_limit);
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phase()->set_ctrl(constrained_limit, pre_ctrl);
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phase()->register_new_node(constrained_limit, pre_ctrl);
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TRACE_ALIGN_VECTOR_NODE(constrained_limit);
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// 6: Hack the pre-loop limit
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