8333652: RISC-V: compiler/vectorapi/VectorGatherMaskFoldingTest.java fails when using RVV
Reviewed-by: fyang
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e0afe0b5e4
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ce5727df44
src/hotspot/cpu/riscv
@ -1828,10 +1828,12 @@ enum Nf {
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// Vector unordered indexed load instructions
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INSN( vluxei8_v, 0b0000111, 0b000, 0b01, 0b0);
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INSN(vluxei32_v, 0b0000111, 0b110, 0b01, 0b0);
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INSN(vluxei64_v, 0b0000111, 0b111, 0b01, 0b0);
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// Vector unordered indexed store instructions
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INSN( vsuxei8_v, 0b0100111, 0b000, 0b01, 0b0);
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INSN(vsuxei32_v, 0b0100111, 0b110, 0b01, 0b0);
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INSN(vsuxei64_v, 0b0100111, 0b111, 0b01, 0b0);
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#undef INSN
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@ -4795,12 +4795,11 @@ instruct vcountTrailingZeros(vReg dst, vReg src) %{
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// ------------------------------ Vector Load Gather ---------------------------
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instruct gather_load(vReg dst, indirect mem, vReg idx) %{
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predicate(type2aelembytes(Matcher::vector_element_basic_type(n)) == 4 ||
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type2aelembytes(Matcher::vector_element_basic_type(n)) == 8);
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instruct gather_loadS(vReg dst, indirect mem, vReg idx) %{
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predicate(type2aelembytes(Matcher::vector_element_basic_type(n)) == 4);
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match(Set dst (LoadVectorGather mem idx));
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effect(TEMP_DEF dst);
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format %{ "gather_load $dst, $mem, $idx" %}
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format %{ "gather_loadS $dst, $mem, $idx" %}
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ins_encode %{
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__ vmv1r_v(as_VectorRegister($dst$$reg), as_VectorRegister($idx$$reg));
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BasicType bt = Matcher::vector_element_basic_type(this);
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@ -4813,12 +4812,28 @@ instruct gather_load(vReg dst, indirect mem, vReg idx) %{
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ins_pipe(pipe_slow);
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%}
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instruct gather_load_masked(vReg dst, indirect mem, vReg idx, vRegMask_V0 v0, vReg tmp) %{
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predicate(type2aelembytes(Matcher::vector_element_basic_type(n)) == 4 ||
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type2aelembytes(Matcher::vector_element_basic_type(n)) == 8);
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instruct gather_loadD(vReg dst, indirect mem, vReg idx) %{
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predicate(type2aelembytes(Matcher::vector_element_basic_type(n)) == 8);
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match(Set dst (LoadVectorGather mem idx));
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effect(TEMP_DEF dst);
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format %{ "gather_loadD $dst, $mem, $idx" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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Assembler::SEW sew = Assembler::elemtype_to_sew(bt);
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__ vsetvli_helper(bt, Matcher::vector_length(this));
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__ vzext_vf2(as_VectorRegister($dst$$reg), as_VectorRegister($idx$$reg));
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__ vsll_vi(as_VectorRegister($dst$$reg), as_VectorRegister($dst$$reg), (int)sew);
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__ vluxei64_v(as_VectorRegister($dst$$reg), as_Register($mem$$base),
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as_VectorRegister($dst$$reg));
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%}
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ins_pipe(pipe_slow);
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%}
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instruct gather_loadS_masked(vReg dst, indirect mem, vReg idx, vRegMask_V0 v0, vReg tmp) %{
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predicate(type2aelembytes(Matcher::vector_element_basic_type(n)) == 4);
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match(Set dst (LoadVectorGatherMasked mem (Binary idx v0)));
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effect(TEMP_DEF dst, TEMP tmp);
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format %{ "gather_load_masked $dst, $mem, $idx, $v0\t# KILL $tmp" %}
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format %{ "gather_loadS_masked $dst, $mem, $idx, $v0\t# KILL $tmp" %}
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ins_encode %{
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__ vmv1r_v(as_VectorRegister($tmp$$reg), as_VectorRegister($idx$$reg));
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BasicType bt = Matcher::vector_element_basic_type(this);
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@ -4833,14 +4848,32 @@ instruct gather_load_masked(vReg dst, indirect mem, vReg idx, vRegMask_V0 v0, vR
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ins_pipe(pipe_slow);
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%}
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instruct gather_loadD_masked(vReg dst, indirect mem, vReg idx, vRegMask_V0 v0, vReg tmp) %{
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predicate(type2aelembytes(Matcher::vector_element_basic_type(n)) == 8);
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match(Set dst (LoadVectorGatherMasked mem (Binary idx v0)));
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effect(TEMP_DEF dst, TEMP tmp);
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format %{ "gather_loadD_masked $dst, $mem, $idx, $v0\t# KILL $tmp" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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Assembler::SEW sew = Assembler::elemtype_to_sew(bt);
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__ vsetvli_helper(bt, Matcher::vector_length(this));
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__ vzext_vf2(as_VectorRegister($tmp$$reg), as_VectorRegister($idx$$reg));
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__ vsll_vi(as_VectorRegister($tmp$$reg), as_VectorRegister($tmp$$reg), (int)sew);
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__ vxor_vv(as_VectorRegister($dst$$reg), as_VectorRegister($dst$$reg),
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as_VectorRegister($dst$$reg));
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__ vluxei64_v(as_VectorRegister($dst$$reg), as_Register($mem$$base),
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as_VectorRegister($tmp$$reg), Assembler::v0_t);
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%}
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ins_pipe(pipe_slow);
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%}
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// ------------------------------ Vector Store Scatter -------------------------
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instruct scatter_store(indirect mem, vReg src, vReg idx, vReg tmp) %{
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predicate(type2aelembytes(Matcher::vector_element_basic_type(n->in(3)->in(1))) == 4 ||
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type2aelembytes(Matcher::vector_element_basic_type(n->in(3)->in(1))) == 8);
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instruct scatter_storeS(indirect mem, vReg src, vReg idx, vReg tmp) %{
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predicate(type2aelembytes(Matcher::vector_element_basic_type(n->in(3)->in(1))) == 4);
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match(Set mem (StoreVectorScatter mem (Binary src idx)));
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effect(TEMP tmp);
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format %{ "scatter_store $mem, $idx, $src\t# KILL $tmp" %}
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format %{ "scatter_storeS $mem, $idx, $src\t# KILL $tmp" %}
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ins_encode %{
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__ vmv1r_v(as_VectorRegister($tmp$$reg), as_VectorRegister($idx$$reg));
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BasicType bt = Matcher::vector_element_basic_type(this, $src);
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@ -4853,12 +4886,28 @@ instruct scatter_store(indirect mem, vReg src, vReg idx, vReg tmp) %{
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ins_pipe(pipe_slow);
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%}
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instruct scatter_store_masked(indirect mem, vReg src, vReg idx, vRegMask_V0 v0, vReg tmp) %{
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predicate(type2aelembytes(Matcher::vector_element_basic_type(n->in(3)->in(1))) == 4 ||
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type2aelembytes(Matcher::vector_element_basic_type(n->in(3)->in(1))) == 8);
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instruct scatter_storeD(indirect mem, vReg src, vReg idx, vReg tmp) %{
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predicate(type2aelembytes(Matcher::vector_element_basic_type(n->in(3)->in(1))) == 8);
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match(Set mem (StoreVectorScatter mem (Binary src idx)));
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effect(TEMP tmp);
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format %{ "scatter_storeD $mem, $idx, $src\t# KILL $tmp" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this, $src);
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Assembler::SEW sew = Assembler::elemtype_to_sew(bt);
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__ vsetvli_helper(bt, Matcher::vector_length(this, $src));
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__ vzext_vf2(as_VectorRegister($tmp$$reg), as_VectorRegister($idx$$reg));
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__ vsll_vi(as_VectorRegister($tmp$$reg), as_VectorRegister($tmp$$reg), (int)sew);
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__ vsuxei64_v(as_VectorRegister($src$$reg), as_Register($mem$$base),
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as_VectorRegister($tmp$$reg));
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%}
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ins_pipe(pipe_slow);
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%}
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instruct scatter_storeS_masked(indirect mem, vReg src, vReg idx, vRegMask_V0 v0, vReg tmp) %{
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predicate(type2aelembytes(Matcher::vector_element_basic_type(n->in(3)->in(1))) == 4);
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match(Set mem (StoreVectorScatterMasked mem (Binary src (Binary idx v0))));
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effect(TEMP tmp);
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format %{ "scatter_store_masked $mem, $idx, $src, $v0\t# KILL $tmp" %}
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format %{ "scatter_storeS_masked $mem, $idx, $src, $v0\t# KILL $tmp" %}
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ins_encode %{
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__ vmv1r_v(as_VectorRegister($tmp$$reg), as_VectorRegister($idx$$reg));
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BasicType bt = Matcher::vector_element_basic_type(this, $src);
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@ -4871,6 +4920,23 @@ instruct scatter_store_masked(indirect mem, vReg src, vReg idx, vRegMask_V0 v0,
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ins_pipe(pipe_slow);
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%}
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instruct scatter_storeD_masked(indirect mem, vReg src, vReg idx, vRegMask_V0 v0, vReg tmp) %{
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predicate(type2aelembytes(Matcher::vector_element_basic_type(n->in(3)->in(1))) == 8);
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match(Set mem (StoreVectorScatterMasked mem (Binary src (Binary idx v0))));
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effect(TEMP tmp);
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format %{ "scatter_storeD_masked $mem, $idx, $src, $v0\t# KILL $tmp" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this, $src);
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Assembler::SEW sew = Assembler::elemtype_to_sew(bt);
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__ vsetvli_helper(bt, Matcher::vector_length(this, $src));
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__ vzext_vf2(as_VectorRegister($tmp$$reg), as_VectorRegister($idx$$reg));
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__ vsll_vi(as_VectorRegister($tmp$$reg), as_VectorRegister($tmp$$reg), (int)sew);
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__ vsuxei64_v(as_VectorRegister($src$$reg), as_Register($mem$$base),
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as_VectorRegister($tmp$$reg), Assembler::v0_t);
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%}
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ins_pipe(pipe_slow);
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%}
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// ------------------------------ Populate Index to a Vector -------------------
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instruct populateindex(vReg dst, iRegIorL2I src1, iRegIorL2I src2, vReg tmp) %{
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