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8294086: RISC-V: Cleanup InstructionMark usages in the backend

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Reviewed-by: fjiang, fyang
This commit is contained in:
Xiaolin Zheng 2022-09-22 03:48:06 +00:00 committed by Fei Yang
parent 47f233acec
commit d5bee4a0df
3 changed files with 9 additions and 21 deletions
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3
src/hotspot/cpu/riscv/assembler_riscv.hpp
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@ -486,10 +486,9 @@ public:
#define INSN_ENTRY_RELOC(result_type, header) \ #define INSN_ENTRY_RELOC(result_type, header) \
result_type header { \ result_type header { \
InstructionMark im(this); \
guarantee(rtype == relocInfo::internal_word_type, \ guarantee(rtype == relocInfo::internal_word_type, \
"only internal_word_type relocs make sense here"); \ "only internal_word_type relocs make sense here"); \
code_section()->relocate(inst_mark(), InternalAddress(dest).rspec()); code_section()->relocate(pc(), InternalAddress(dest).rspec());
// Load/store register (all modes) // Load/store register (all modes)
#define INSN(NAME, op, funct3) \ #define INSN(NAME, op, funct3) \

25
src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
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@ -240,7 +240,6 @@ void MacroAssembler::set_last_Java_frame(Register last_java_sp,
if (L.is_bound()) { if (L.is_bound()) {
set_last_Java_frame(last_java_sp, last_java_fp, target(L), tmp); set_last_Java_frame(last_java_sp, last_java_fp, target(L), tmp);
} else { } else {
InstructionMark im(this);
L.add_patch_at(code(), locator()); L.add_patch_at(code(), locator());
set_last_Java_frame(last_java_sp, last_java_fp, pc() /* Patched later */, tmp); set_last_Java_frame(last_java_sp, last_java_fp, pc() /* Patched later */, tmp);
} }
@ -731,8 +730,7 @@ void MacroAssembler::la(Register Rd, const address &dest) {
} }
void MacroAssembler::la(Register Rd, const Address &adr) { void MacroAssembler::la(Register Rd, const Address &adr) {
InstructionMark im(this); code_section()->relocate(pc(), adr.rspec());
code_section()->relocate(inst_mark(), adr.rspec());
relocInfo::relocType rtype = adr.rspec().reloc()->type(); relocInfo::relocType rtype = adr.rspec().reloc()->type();
switch (adr.getMode()) { switch (adr.getMode()) {
@ -2702,8 +2700,7 @@ void MacroAssembler::la_patchable(Register reg1, const Address &dest, int32_t &o
assert(is_valid_riscv64_address(dest.target()), "bad address"); assert(is_valid_riscv64_address(dest.target()), "bad address");
assert(dest.getMode() == Address::literal, "la_patchable must be applied to a literal address"); assert(dest.getMode() == Address::literal, "la_patchable must be applied to a literal address");
InstructionMark im(this); code_section()->relocate(pc(), dest.rspec());
code_section()->relocate(inst_mark(), dest.rspec());
// RISC-V doesn't compute a page-aligned address, in order to partially // RISC-V doesn't compute a page-aligned address, in order to partially
// compensate for the use of *signed* offsets in its base+disp12 // compensate for the use of *signed* offsets in its base+disp12
// addressing mode (RISC-V's PC-relative reach remains asymmetric // addressing mode (RISC-V's PC-relative reach remains asymmetric
@ -2766,15 +2763,9 @@ void MacroAssembler::get_polling_page(Register dest, relocInfo::relocType rtype)
// Read the polling page. The address of the polling page must // Read the polling page. The address of the polling page must
// already be in r. // already be in r.
address MacroAssembler::read_polling_page(Register r, int32_t offset, relocInfo::relocType rtype) { void MacroAssembler::read_polling_page(Register r, int32_t offset, relocInfo::relocType rtype) {
address mark; code_section()->relocate(pc(), rtype);
{ lwu(zr, Address(r, offset));
InstructionMark im(this);
code_section()->relocate(inst_mark(), rtype);
lwu(zr, Address(r, offset));
mark = inst_mark();
}
return mark;
} }
void MacroAssembler::set_narrow_oop(Register dst, jobject obj) { void MacroAssembler::set_narrow_oop(Register dst, jobject obj) {
@ -2788,9 +2779,8 @@ void MacroAssembler::set_narrow_oop(Register dst, jobject obj) {
} }
#endif #endif
int oop_index = oop_recorder()->find_index(obj); int oop_index = oop_recorder()->find_index(obj);
InstructionMark im(this);
RelocationHolder rspec = oop_Relocation::spec(oop_index); RelocationHolder rspec = oop_Relocation::spec(oop_index);
code_section()->relocate(inst_mark(), rspec); code_section()->relocate(pc(), rspec);
li32(dst, 0xDEADBEEF); li32(dst, 0xDEADBEEF);
zero_extend(dst, dst, 32); zero_extend(dst, dst, 32);
} }
@ -2801,9 +2791,8 @@ void MacroAssembler::set_narrow_klass(Register dst, Klass* k) {
int index = oop_recorder()->find_index(k); int index = oop_recorder()->find_index(k);
assert(!Universe::heap()->is_in(k), "should not be an oop"); assert(!Universe::heap()->is_in(k), "should not be an oop");
InstructionMark im(this);
RelocationHolder rspec = metadata_Relocation::spec(index); RelocationHolder rspec = metadata_Relocation::spec(index);
code_section()->relocate(inst_mark(), rspec); code_section()->relocate(pc(), rspec);
narrowKlass nk = CompressedKlassPointers::encode(k); narrowKlass nk = CompressedKlassPointers::encode(k);
li32(dst, nk); li32(dst, nk);
zero_extend(dst, dst, 32); zero_extend(dst, dst, 32);

2
src/hotspot/cpu/riscv/macroAssembler_riscv.hpp
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@ -641,7 +641,7 @@ public:
void reserved_stack_check(); void reserved_stack_check();
void get_polling_page(Register dest, relocInfo::relocType rtype); void get_polling_page(Register dest, relocInfo::relocType rtype);
address read_polling_page(Register r, int32_t offset, relocInfo::relocType rtype); void read_polling_page(Register r, int32_t offset, relocInfo::relocType rtype);
// RISCV64 OpenJDK uses four different types of calls: // RISCV64 OpenJDK uses four different types of calls:
// - direct call: jal pc_relative_offset // - direct call: jal pc_relative_offset