From da271b804e0224f7b1f1216c554253c5be193f92 Mon Sep 17 00:00:00 2001
From: Thomas Salter <thomas.salter@unisys.com>
Date: Tue, 24 May 2011 15:30:05 -0700
Subject: [PATCH] 7046893: LP64 problem with double_quadword in
c1_LIRAssembler_x86.cpp
Fixed invalid casts in address computation
Reviewed-by: kvn, never
---
hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp b/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp
index 474e9579511..eb34d55bc4b 100644
--- a/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp
+++ b/hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp
@@ -47,7 +47,7 @@
static jlong* double_quadword(jlong *adr, jlong lo, jlong hi) {
// Use the expression (adr)&(~0xF) to provide 128-bits aligned address
// of 128-bits operands for SSE instructions.
- jlong *operand = (jlong*)(((long)adr)&((long)(~0xF)));
+ jlong *operand = (jlong*)(((intptr_t)adr) & ((intptr_t)(~0xF)));
// Store the value to a 128-bits operand.
operand[0] = lo;
operand[1] = hi;