stan/jdk-24
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

8308915: RISC-V: Improve temporary vector register usage avoiding the use of v0

Browse Source 
Reviewed-by: yzhu, fyang
This commit is contained in:
Dingli Zhang 2023-05-29 01:03:01 +00:00 committed by Fei Yang
parent 547a8b40b3
commit e21f865d84
3 changed files with 125 additions and 64 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

39
src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp
View File

@ -1377,7 +1377,7 @@ void C2_MacroAssembler::string_equals_v(Register a1, Register a2, Register resul
srli(cnt, cnt, 1);
}
element_compare(a1, a2, result, cnt, tmp1, tmp2, v0, v2, v0, elem_size == 1, DONE);
element_compare(a1, a2, result, cnt, tmp1, tmp2, v2, v4, v2, elem_size == 1, DONE);
bind(DONE);
BLOCK_COMMENT("} string_equals_v");
@ -1387,17 +1387,17 @@ void C2_MacroAssembler::string_equals_v(Register a1, Register a2, Register resul
// base: Address of a buffer to be zeroed
// cnt: Count in HeapWords
//
// base, cnt, v0, v1 and t0 are clobbered.
// base, cnt, v4, v5, v6, v7 and t0 are clobbered.
void C2_MacroAssembler::clear_array_v(Register base, Register cnt) {
Label loop;
// making zero words
vsetvli(t0, cnt, Assembler::e64, Assembler::m4);
vxor_vv(v0, v0, v0);
vxor_vv(v4, v4, v4);
bind(loop);
vsetvli(t0, cnt, Assembler::e64, Assembler::m4);
vse64_v(v0, base);
vse64_v(v4, base);
sub(cnt, cnt, t0);
shadd(base, t0, base, t0, 3);
bnez(cnt, loop);
@ -1430,7 +1430,7 @@ void C2_MacroAssembler::arrays_equals_v(Register a1, Register a2, Register resul
la(a1, Address(a1, base_offset));
la(a2, Address(a2, base_offset));
element_compare(a1, a2, result, cnt1, tmp1, tmp2, v0, v2, v0, elem_size == 1, DONE);
element_compare(a1, a2, result, cnt1, tmp1, tmp2, v2, v4, v2, elem_size == 1, DONE);
bind(DONE);
@ -1466,13 +1466,13 @@ void C2_MacroAssembler::string_compare_v(Register str1, Register str2, Register
bind(L);
if (str1_isL == str2_isL) { // LL or UU
element_compare(str1, str2, zr, cnt2, tmp1, tmp2, v2, v4, v1, encLL, DIFFERENCE);
element_compare(str1, str2, zr, cnt2, tmp1, tmp2, v2, v4, v2, encLL, DIFFERENCE);
j(DONE);
} else { // LU or UL
Register strL = encLU ? str1 : str2;
Register strU = encLU ? str2 : str1;
VectorRegister vstr1 = encLU ? v4 : v0;
VectorRegister vstr2 = encLU ? v0 : v4;
VectorRegister vstr1 = encLU ? v8 : v4;
VectorRegister vstr2 = encLU ? v4 : v8;
bind(loop);
vsetvli(tmp1, cnt2, Assembler::e8, Assembler::m2);
@ -1480,8 +1480,8 @@ void C2_MacroAssembler::string_compare_v(Register str1, Register str2, Register
vsetvli(tmp1, cnt2, Assembler::e16, Assembler::m4);
vzext_vf2(vstr2, vstr1);
vle16_v(vstr1, strU);
vmsne_vv(v0, vstr2, vstr1);
vfirst_m(tmp2, v0);
vmsne_vv(v4, vstr2, vstr1);
vfirst_m(tmp2, v4);
bgez(tmp2, DIFFERENCE);
sub(cnt2, cnt2, tmp1);
add(strL, strL, tmp1);
@ -1489,6 +1489,7 @@ void C2_MacroAssembler::string_compare_v(Register str1, Register str2, Register
bnez(cnt2, loop);
j(DONE);
}
bind(DIFFERENCE);
slli(tmp1, tmp2, 1);
add(str1, str1, str1_isL ? tmp2 : tmp1);
@ -1507,10 +1508,10 @@ void C2_MacroAssembler::byte_array_inflate_v(Register src, Register dst, Registe
BLOCK_COMMENT("byte_array_inflate_v {");
bind(loop);
vsetvli(tmp, len, Assembler::e8, Assembler::m2);
vle8_v(v2, src);
vle8_v(v6, src);
vsetvli(t0, len, Assembler::e16, Assembler::m4);
vzext_vf2(v0, v2);
vse16_v(v0, dst);
vzext_vf2(v4, v6);
vse16_v(v4, dst);
sub(len, len, tmp);
add(src, src, tmp);
shadd(dst, tmp, dst, tmp, 1);
@ -1573,9 +1574,9 @@ void C2_MacroAssembler::count_positives_v(Register ary, Register len, Register r
bind(LOOP);
vsetvli(t0, len, Assembler::e8, Assembler::m4);
vle8_v(v0, ary);
vmslt_vx(v0, v0, zr);
vfirst_m(tmp, v0);
vle8_v(v4, ary);
vmslt_vx(v4, v4, zr);
vfirst_m(tmp, v4);
bgez(tmp, SET_RESULT);
// if tmp == -1, all bytes are positive
add(result, result, t0);
@ -1603,9 +1604,9 @@ void C2_MacroAssembler::string_indexof_char_v(Register str1, Register cnt1,
Assembler::SEW sew = isL ? Assembler::e8 : Assembler::e16;
bind(loop);
vsetvli(tmp1, cnt1, sew, Assembler::m4);
vlex_v(v0, str1, sew);
vmseq_vx(v0, v0, ch);
vfirst_m(tmp2, v0);
vlex_v(v4, str1, sew);
vmseq_vx(v4, v4, ch);
vfirst_m(tmp2, v4);
bgez(tmp2, MATCH); // if equal, return index
add(result, result, tmp1);

68
src/hotspot/cpu/riscv/riscv.ad
View File

@ -914,6 +914,26 @@ reg_class v7_reg(
V7, V7_H, V7_J, V7_K
);
// class for vector register v8
reg_class v8_reg(
V8, V8_H, V8_J, V8_K
);
// class for vector register v9
reg_class v9_reg(
V9, V9_H, V9_J, V9_K
);
// class for vector register v10
reg_class v10_reg(
V10, V10_H, V10_J, V10_K
);
// class for vector register v11
reg_class v11_reg(
V11, V11_H, V11_J, V11_K
);
// class for condition codes
reg_class reg_flags(RFLAGS);
@ -3628,6 +3648,46 @@ operand vReg_V7()
interface(REG_INTER);
%}
operand vReg_V8()
%{
constraint(ALLOC_IN_RC(v8_reg));
match(VecA);
match(vReg);
op_cost(0);
format %{ %}
interface(REG_INTER);
%}
operand vReg_V9()
%{
constraint(ALLOC_IN_RC(v9_reg));
match(VecA);
match(vReg);
op_cost(0);
format %{ %}
interface(REG_INTER);
%}
operand vReg_V10()
%{
constraint(ALLOC_IN_RC(v10_reg));
match(VecA);
match(vReg);
op_cost(0);
format %{ %}
interface(REG_INTER);
%}
operand vReg_V11()
%{
constraint(ALLOC_IN_RC(v11_reg));
match(VecA);
match(vReg);
op_cost(0);
format %{ %}
interface(REG_INTER);
%}
operand vRegMask()
%{
constraint(ALLOC_IN_RC(vmask_reg));
@ -9940,7 +10000,7 @@ instruct string_compareU(iRegP_R11 str1, iRegI_R12 cnt1, iRegP_R13 str2, iRegI_R
iRegI_R10 result, iRegP_R28 tmp1, iRegL_R29 tmp2, iRegL_R30 tmp3, rFlagsReg cr)
%{
predicate(!UseRVV && ((StrCompNode *)n)->encoding() == StrIntrinsicNode::UU);
match(Set result (StrComp(Binary str1 cnt1)(Binary str2 cnt2)));
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
effect(KILL tmp1, KILL tmp2, KILL tmp3, USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
format %{ "String Compare $str1, $cnt1, $str2, $cnt2 -> $result\t#@string_compareU" %}
@ -9958,7 +10018,7 @@ instruct string_compareL(iRegP_R11 str1, iRegI_R12 cnt1, iRegP_R13 str2, iRegI_R
iRegI_R10 result, iRegP_R28 tmp1, iRegL_R29 tmp2, iRegL_R30 tmp3, rFlagsReg cr)
%{
predicate(!UseRVV && ((StrCompNode *)n)->encoding() == StrIntrinsicNode::LL);
match(Set result (StrComp(Binary str1 cnt1)(Binary str2 cnt2)));
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
effect(KILL tmp1, KILL tmp2, KILL tmp3, USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
format %{ "String Compare $str1, $cnt1, $str2, $cnt2 -> $result\t#@string_compareL" %}
@ -9975,7 +10035,7 @@ instruct string_compareUL(iRegP_R11 str1, iRegI_R12 cnt1, iRegP_R13 str2, iRegI_
iRegI_R10 result, iRegP_R28 tmp1, iRegL_R29 tmp2, iRegL_R30 tmp3, rFlagsReg cr)
%{
predicate(!UseRVV && ((StrCompNode *)n)->encoding() == StrIntrinsicNode::UL);
match(Set result (StrComp(Binary str1 cnt1)(Binary str2 cnt2)));
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
effect(KILL tmp1, KILL tmp2, KILL tmp3, USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
format %{"String Compare $str1, $cnt1, $str2, $cnt2 -> $result\t#@string_compareUL" %}
@ -9993,7 +10053,7 @@ instruct string_compareLU(iRegP_R11 str1, iRegI_R12 cnt1, iRegP_R13 str2, iRegI_
rFlagsReg cr)
%{
predicate(!UseRVV && ((StrCompNode *)n)->encoding() == StrIntrinsicNode::LU);
match(Set result (StrComp(Binary str1 cnt1)(Binary str2 cnt2)));
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
effect(KILL tmp1, KILL tmp2, KILL tmp3, USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
format %{ "String Compare $str1, $cnt1, $str2, $cnt2 -> $result\t#@string_compareLU" %}

82
src/hotspot/cpu/riscv/riscv_v.ad
View File

@ -3027,12 +3027,12 @@ instruct vsub_fp_masked(vReg dst_src1, vReg src2, vRegMask_V0 v0) %{
%}
instruct vstring_equalsL(iRegP_R11 str1, iRegP_R13 str2, iRegI_R14 cnt,
iRegI_R10 result, vReg_V1 v1,
vReg_V2 v2, vReg_V3 v3, vRegMask_V0 v0, rFlagsReg cr)
iRegI_R10 result, vReg_V2 v2,
vReg_V3 v3, vReg_V4 v4, vReg_V5 v5, rFlagsReg cr)
%{
predicate(UseRVV && ((StrEqualsNode*)n)->encoding() == StrIntrinsicNode::LL);
match(Set result (StrEquals (Binary str1 str2) cnt));
effect(USE_KILL str1, USE_KILL str2, USE_KILL cnt, TEMP v1, TEMP v2, TEMP v3, TEMP v0, KILL cr);
effect(USE_KILL str1, USE_KILL str2, USE_KILL cnt, TEMP v2, TEMP v3, TEMP v4, TEMP v5, KILL cr);
format %{ "String Equals $str1, $str2, $cnt -> $result\t#@string_equalsL" %}
ins_encode %{
@ -3044,12 +3044,12 @@ instruct vstring_equalsL(iRegP_R11 str1, iRegP_R13 str2, iRegI_R14 cnt,
%}
instruct vstring_equalsU(iRegP_R11 str1, iRegP_R13 str2, iRegI_R14 cnt,
iRegI_R10 result, vReg_V1 v1,
vReg_V2 v2, vReg_V3 v3, vRegMask_V0 v0, rFlagsReg cr)
iRegI_R10 result, vReg_V2 v2,
vReg_V3 v3, vReg_V4 v4, vReg_V5 v5, rFlagsReg cr)
%{
predicate(UseRVV && ((StrEqualsNode*)n)->encoding() == StrIntrinsicNode::UU);
match(Set result (StrEquals (Binary str1 str2) cnt));
effect(USE_KILL str1, USE_KILL str2, USE_KILL cnt, TEMP v1, TEMP v2, TEMP v3, TEMP v0, KILL cr);
effect(USE_KILL str1, USE_KILL str2, USE_KILL cnt, TEMP v2, TEMP v3, TEMP v4, TEMP v5, KILL cr);
format %{ "String Equals $str1, $str2, $cnt -> $result\t#@string_equalsU" %}
ins_encode %{
@ -3061,11 +3061,11 @@ instruct vstring_equalsU(iRegP_R11 str1, iRegP_R13 str2, iRegI_R14 cnt,
%}
instruct varray_equalsB(iRegP_R11 ary1, iRegP_R12 ary2, iRegI_R10 result,
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, vRegMask_V0 v0, iRegP_R28 tmp, rFlagsReg cr)
vReg_V2 v2, vReg_V3 v3, vReg_V4 v4, vReg_V5 v5, iRegP_R28 tmp, rFlagsReg cr)
%{
predicate(UseRVV && ((AryEqNode*)n)->encoding() == StrIntrinsicNode::LL);
match(Set result (AryEq ary1 ary2));
effect(KILL tmp, USE_KILL ary1, USE_KILL ary2, TEMP v1, TEMP v2, TEMP v3, TEMP v0, KILL cr);
effect(KILL tmp, USE_KILL ary1, USE_KILL ary2, TEMP v2, TEMP v3, TEMP v4, TEMP v5, KILL cr);
format %{ "Array Equals $ary1, ary2 -> $result\t#@array_equalsB // KILL $tmp" %}
ins_encode %{
@ -3076,11 +3076,11 @@ instruct varray_equalsB(iRegP_R11 ary1, iRegP_R12 ary2, iRegI_R10 result,
%}
instruct varray_equalsC(iRegP_R11 ary1, iRegP_R12 ary2, iRegI_R10 result,
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, vRegMask_V0 v0, iRegP_R28 tmp, rFlagsReg cr)
vReg_V2 v2, vReg_V3 v3, vReg_V4 v4, vReg_V5 v5, iRegP_R28 tmp, rFlagsReg cr)
%{
predicate(UseRVV && ((AryEqNode*)n)->encoding() == StrIntrinsicNode::UU);
match(Set result (AryEq ary1 ary2));
effect(KILL tmp, USE_KILL ary1, USE_KILL ary2, TEMP v1, TEMP v2, TEMP v3, TEMP v0, KILL cr);
effect(KILL tmp, USE_KILL ary1, USE_KILL ary2, TEMP v2, TEMP v3, TEMP v4, TEMP v5, KILL cr);
format %{ "Array Equals $ary1, ary2 -> $result\t#@array_equalsC // KILL $tmp" %}
ins_encode %{
@ -3091,13 +3091,13 @@ instruct varray_equalsC(iRegP_R11 ary1, iRegP_R12 ary2, iRegI_R10 result,
%}
instruct vstring_compareU(iRegP_R11 str1, iRegI_R12 cnt1, iRegP_R13 str2, iRegI_R14 cnt2,
iRegI_R10 result, vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, vReg_V4 v4, vReg_V5 v5,
vRegMask_V0 v0, iRegP_R28 tmp1, iRegL_R29 tmp2)
iRegI_R10 result, vReg_V2 v2, vReg_V3 v3, vReg_V4 v4, vReg_V5 v5,
iRegP_R28 tmp1, iRegL_R29 tmp2)
%{
predicate(UseRVV && ((StrCompNode *)n)->encoding() == StrIntrinsicNode::UU);
match(Set result(StrComp(Binary str1 cnt1)(Binary str2 cnt2)));
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
effect(KILL tmp1, KILL tmp2, USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2,
TEMP v1, TEMP v2, TEMP v3, TEMP v4, TEMP v5, TEMP v0);
TEMP v2, TEMP v3, TEMP v4, TEMP v5);
format %{ "String Compare $str1, $cnt1, $str2, $cnt2 -> $result\t#@string_compareU" %}
ins_encode %{
@ -3110,13 +3110,13 @@ instruct vstring_compareU(iRegP_R11 str1, iRegI_R12 cnt1, iRegP_R13 str2, iRegI_
ins_pipe(pipe_class_memory);
%}
instruct vstring_compareL(iRegP_R11 str1, iRegI_R12 cnt1, iRegP_R13 str2, iRegI_R14 cnt2,
iRegI_R10 result, vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, vReg_V4 v4, vReg_V5 v5,
vRegMask_V0 v0, iRegP_R28 tmp1, iRegL_R29 tmp2)
iRegI_R10 result, vReg_V2 v2, vReg_V3 v3, vReg_V4 v4, vReg_V5 v5,
iRegP_R28 tmp1, iRegL_R29 tmp2)
%{
predicate(UseRVV && ((StrCompNode *)n)->encoding() == StrIntrinsicNode::LL);
match(Set result(StrComp(Binary str1 cnt1)(Binary str2 cnt2)));
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
effect(KILL tmp1, KILL tmp2, USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2,
TEMP v1, TEMP v2, TEMP v3, TEMP v4, TEMP v5, TEMP v0);
TEMP v2, TEMP v3, TEMP v4, TEMP v5);
format %{ "String Compare $str1, $cnt1, $str2, $cnt2 -> $result\t#@string_compareL" %}
ins_encode %{
@ -3129,14 +3129,14 @@ instruct vstring_compareL(iRegP_R11 str1, iRegI_R12 cnt1, iRegP_R13 str2, iRegI_
%}
instruct vstring_compareUL(iRegP_R11 str1, iRegI_R12 cnt1, iRegP_R13 str2, iRegI_R14 cnt2,
iRegI_R10 result, vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, vReg_V4 v4,
vReg_V5 v5, vReg_V6 v6, vReg_V7 v7,
vRegMask_V0 v0, iRegP_R28 tmp1, iRegL_R29 tmp2)
iRegI_R10 result, vReg_V4 v4, vReg_V5 v5, vReg_V6 v6, vReg_V7 v7,
vReg_V8 v8, vReg_V9 v9, vReg_V10 v10, vReg_V11 v11,
iRegP_R28 tmp1, iRegL_R29 tmp2)
%{
predicate(UseRVV && ((StrCompNode *)n)->encoding() == StrIntrinsicNode::UL);
match(Set result(StrComp(Binary str1 cnt1)(Binary str2 cnt2)));
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
effect(KILL tmp1, KILL tmp2, USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2,
TEMP v1, TEMP v2, TEMP v3, TEMP v4, TEMP v5, TEMP v6, TEMP v7, TEMP v0);
TEMP v4, TEMP v5, TEMP v6, TEMP v7, TEMP v8, TEMP v9, TEMP v10, TEMP v11);
format %{"String Compare $str1, $cnt1, $str2, $cnt2 -> $result\t#@string_compareUL" %}
ins_encode %{
@ -3148,14 +3148,14 @@ instruct vstring_compareUL(iRegP_R11 str1, iRegI_R12 cnt1, iRegP_R13 str2, iRegI
ins_pipe(pipe_class_memory);
%}
instruct vstring_compareLU(iRegP_R11 str1, iRegI_R12 cnt1, iRegP_R13 str2, iRegI_R14 cnt2,
iRegI_R10 result, vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, vReg_V4 v4,
vReg_V5 v5, vReg_V6 v6, vReg_V7 v7,
vRegMask_V0 v0, iRegP_R28 tmp1, iRegL_R29 tmp2)
iRegI_R10 result, vReg_V4 v4, vReg_V5 v5, vReg_V6 v6, vReg_V7 v7,
vReg_V8 v8, vReg_V9 v9, vReg_V10 v10, vReg_V11 v11,
iRegP_R28 tmp1, iRegL_R29 tmp2)
%{
predicate(UseRVV && ((StrCompNode *)n)->encoding() == StrIntrinsicNode::LU);
match(Set result(StrComp(Binary str1 cnt1)(Binary str2 cnt2)));
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
effect(KILL tmp1, KILL tmp2, USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2,
TEMP v1, TEMP v2, TEMP v3, TEMP v4, TEMP v5, TEMP v6, TEMP v7, TEMP v0);
TEMP v4, TEMP v5, TEMP v6, TEMP v7, TEMP v8, TEMP v9, TEMP v10, TEMP v11);
format %{ "String Compare $str1, $cnt1, $str2, $cnt2 -> $result\t#@string_compareLU" %}
ins_encode %{
@ -3169,11 +3169,11 @@ instruct vstring_compareLU(iRegP_R11 str1, iRegI_R12 cnt1, iRegP_R13 str2, iRegI
// fast byte[] to char[] inflation
instruct vstring_inflate(Universe dummy, iRegP_R10 src, iRegP_R11 dst, iRegI_R12 len,
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, vRegMask_V0 v0, iRegLNoSp tmp)
vReg_V4 v4, vReg_V5 v5, vReg_V6 v6, vReg_V7 v7, iRegLNoSp tmp)
%{
predicate(UseRVV);
match(Set dummy (StrInflatedCopy src (Binary dst len)));
effect(TEMP v1, TEMP v2, TEMP v3, TEMP v0, TEMP tmp, USE_KILL src, USE_KILL dst, USE_KILL len);
effect(TEMP v4, TEMP v5, TEMP v6, TEMP v7, TEMP tmp, USE_KILL src, USE_KILL dst, USE_KILL len);
format %{ "String Inflate $src,$dst" %}
ins_encode %{
@ -3196,7 +3196,7 @@ instruct vencode_iso_array(iRegP_R12 src, iRegP_R11 dst, iRegI_R13 len, iRegI_R1
__ encode_iso_array_v($src$$Register, $dst$$Register, $len$$Register,
$result$$Register, $tmp$$Register);
%}
ins_pipe( pipe_class_memory );
ins_pipe(pipe_class_memory);
%}
// fast char[] to byte[] compression
@ -3213,32 +3213,32 @@ instruct vstring_compress(iRegP_R12 src, iRegP_R11 dst, iRegI_R13 len, iRegI_R10
__ char_array_compress_v($src$$Register, $dst$$Register, $len$$Register,
$result$$Register, $tmp$$Register);
%}
ins_pipe( pipe_slow );
ins_pipe(pipe_class_memory);
%}
instruct vcount_positives(iRegP_R11 ary, iRegI_R12 len, iRegI_R10 result,
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, vRegMask_V0 v0, iRegLNoSp tmp)
vReg_V4 v4, vReg_V5 v5, vReg_V6 v6, vReg_V7 v7, iRegLNoSp tmp)
%{
predicate(UseRVV);
match(Set result (CountPositives ary len));
effect(TEMP_DEF result, USE_KILL ary, USE_KILL len, TEMP v1, TEMP v2, TEMP v3, TEMP tmp, TEMP v0);
effect(TEMP_DEF result, USE_KILL ary, USE_KILL len, TEMP v4, TEMP v5, TEMP v6, TEMP v7, TEMP tmp);
format %{ "count positives byte[] $ary, $len -> $result" %}
ins_encode %{
__ count_positives_v($ary$$Register, $len$$Register, $result$$Register, $tmp$$Register);
%}
ins_pipe(pipe_slow);
ins_pipe(pipe_class_memory);
%}
instruct vstringU_indexof_char(iRegP_R11 str1, iRegI_R12 cnt1, iRegI_R13 ch,
iRegI_R10 result, iRegINoSp tmp1, iRegINoSp tmp2,
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, vRegMask_V0 v0)
vReg_V4 v4, vReg_V5 v5, vReg_V6 v6, vReg_V7 v7)
%{
predicate(UseRVV && (((StrIndexOfCharNode*)n)->encoding() == StrIntrinsicNode::U));
match(Set result (StrIndexOfChar (Binary str1 cnt1) ch));
effect(TEMP_DEF result, USE_KILL str1, USE_KILL cnt1, USE_KILL ch,
TEMP tmp1, TEMP tmp2, TEMP v1, TEMP v2, TEMP v3, TEMP v0);
TEMP tmp1, TEMP tmp2, TEMP v4, TEMP v5, TEMP v6, TEMP v7);
format %{ "StringUTF16 IndexOf char[] $str1, $cnt1, $ch -> $result" %}
@ -3253,12 +3253,12 @@ instruct vstringU_indexof_char(iRegP_R11 str1, iRegI_R12 cnt1, iRegI_R13 ch,
instruct vstringL_indexof_char(iRegP_R11 str1, iRegI_R12 cnt1, iRegI_R13 ch,
iRegI_R10 result, iRegINoSp tmp1, iRegINoSp tmp2,
vReg_V1 v1, vReg_V2 v2, vReg_V3 v3, vRegMask_V0 v0)
vReg_V4 v4, vReg_V5 v5, vReg_V6 v6, vReg_V7 v7)
%{
predicate(UseRVV && (((StrIndexOfCharNode*)n)->encoding() == StrIntrinsicNode::L));
match(Set result (StrIndexOfChar (Binary str1 cnt1) ch));
effect(TEMP_DEF result, USE_KILL str1, USE_KILL cnt1, USE_KILL ch,
TEMP tmp1, TEMP tmp2, TEMP v1, TEMP v2, TEMP v3, TEMP v0);
TEMP tmp1, TEMP tmp2, TEMP v4, TEMP v5, TEMP v6, TEMP v7);
format %{ "StringLatin1 IndexOf char[] $str1, $cnt1, $ch -> $result" %}
@ -3273,11 +3273,11 @@ instruct vstringL_indexof_char(iRegP_R11 str1, iRegI_R12 cnt1, iRegI_R13 ch,
// clearing of an array
instruct vclearArray_reg_reg(iRegL_R29 cnt, iRegP_R28 base, Universe dummy,
vReg_V1 vReg1, vReg_V2 vReg2, vReg_V3 vReg3, vRegMask_V0 v0)
vReg_V4 v4, vReg_V5 v5, vReg_V6 v6, vReg_V7 v7)
%{
predicate(!UseBlockZeroing && UseRVV);
match(Set dummy (ClearArray cnt base));
effect(USE_KILL cnt, USE_KILL base, TEMP vReg1, TEMP vReg2, TEMP vReg3, TEMP v0);
effect(USE_KILL cnt, USE_KILL base, TEMP v4, TEMP v5, TEMP v6, TEMP v7);
format %{ "ClearArray $cnt, $base\t#@clearArray_reg_reg" %}