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8293618: x86: Wrong code generation in class Assembler

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Reviewed-by: kvn, thartmann
This commit is contained in:
Quan Anh Mai 2022-09-23 17:12:48 +00:00 committed by Vladimir Kozlov
parent 6ecd08172b
commit e2f8251490
5 changed files with 515 additions and 478 deletions
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917
src/hotspot/cpu/x86/assembler_x86.cpp
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File diff suppressed because it is too large Load Diff

27
src/hotspot/cpu/x86/assembler_x86.hpp
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@ -755,51 +755,55 @@ private:
int base_enc, int index_enc, Address::ScaleFactor scale,
int disp,
RelocationHolder const& rspec,
int rip_relative_correction = 0);
int post_addr_length);
void emit_operand(Register reg,
Register base, Register index, Address::ScaleFactor scale,
int disp,
RelocationHolder const& rspec,
int rip_relative_correction = 0);
int post_addr_length);
void emit_operand(Register reg,
Register base, XMMRegister index, Address::ScaleFactor scale,
int disp,
RelocationHolder const& rspec);
RelocationHolder const& rspec,
int post_addr_length);
void emit_operand(XMMRegister xreg,
Register base, XMMRegister xindex, Address::ScaleFactor scale,
int disp,
RelocationHolder const& rspec);
RelocationHolder const& rspec,
int post_addr_length);
void emit_operand(Register reg, Address adr,
int rip_relative_correction = 0);
int post_addr_length);
void emit_operand(XMMRegister reg,
Register base, Register index, Address::ScaleFactor scale,
int disp,
RelocationHolder const& rspec);
RelocationHolder const& rspec,
int post_addr_length);
void emit_operand_helper(KRegister kreg,
int base_enc, int index_enc, Address::ScaleFactor scale,
int disp,
RelocationHolder const& rspec,
int rip_relative_correction = 0);
int post_addr_length);
void emit_operand(KRegister kreg, Address adr,
int rip_relative_correction = 0);
int post_addr_length);
void emit_operand(KRegister kreg,
Register base, Register index, Address::ScaleFactor scale,
int disp,
RelocationHolder const& rspec,
int rip_relative_correction = 0);
int post_addr_length);
void emit_operand(XMMRegister reg, Address adr);
void emit_operand(XMMRegister reg, Address adr, int post_addr_length);
// Immediate-to-memory forms
void emit_arith_operand(int op1, Register rm, Address adr, int32_t imm32);
void emit_arith_operand_imm32(int op1, Register rm, Address adr, int32_t imm32);
protected:
#ifdef ASSERT
@ -1099,6 +1103,7 @@ private:
void cmpl(Register dst, int32_t imm32);
void cmpl(Register dst, Register src);
void cmpl(Register dst, Address src);
void cmpl_imm32(Address dst, int32_t imm32);
void cmpq(Address dst, int32_t imm32);
void cmpq(Address dst, Register src);
@ -1366,7 +1371,7 @@ private:
#endif // !_LP64
// operands that only take the original 32bit registers
void emit_operand32(Register reg, Address adr);
void emit_operand32(Register reg, Address adr, int post_addr_length);
void fld_x(Address adr); // extended-precision (80-bit) format
void fstp_x(Address adr); // extended-precision (80-bit) format

4
src/hotspot/cpu/x86/gc/shared/barrierSetAssembler_x86.cpp
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@ -285,7 +285,7 @@ void BarrierSetAssembler::nmethod_entry_barrier(MacroAssembler* masm, Label* slo
// byte aligned, which means that the immediate will not cross a cache line
__ align(4);
uintptr_t before_cmp = (uintptr_t)__ pc();
__ cmpl(disarmed_addr, 0);
__ cmpl_imm32(disarmed_addr, 0);
uintptr_t after_cmp = (uintptr_t)__ pc();
guarantee(after_cmp - before_cmp == 8, "Wrong assumed instruction length");
@ -313,7 +313,7 @@ void BarrierSetAssembler::nmethod_entry_barrier(MacroAssembler* masm, Label*, La
__ movptr(tmp, (intptr_t)bs_nm->disarmed_value_address());
Address disarmed_addr(tmp, 0);
__ align(4);
__ cmpl(disarmed_addr, 0);
__ cmpl_imm32(disarmed_addr, 0);
__ pop(tmp);
__ jcc(Assembler::equal, continuation);
__ call(RuntimeAddress(StubRoutines::x86::method_entry_barrier()));

38
src/hotspot/cpu/x86/macroAssembler_x86.cpp
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@ -3125,11 +3125,47 @@ void MacroAssembler::sign_extend_short(Register reg) {
}
}
void MacroAssembler::testl(Address dst, int32_t imm32) {
if (imm32 >= 0 && is8bit(imm32)) {
testb(dst, imm32);
} else {
Assembler::testl(dst, imm32);
}
}
void MacroAssembler::testl(Register dst, int32_t imm32) {
if (imm32 >= 0 && is8bit(imm32) && dst->has_byte_register()) {
testb(dst, imm32);
} else {
Assembler::testl(dst, imm32);
}
}
void MacroAssembler::testl(Register dst, AddressLiteral src) {
assert(reachable(src), "Address should be reachable");
assert(always_reachable(src), "Address should be reachable");
testl(dst, as_Address(src));
}
#ifdef _LP64
void MacroAssembler::testq(Address dst, int32_t imm32) {
if (imm32 >= 0) {
testl(dst, imm32);
} else {
Assembler::testq(dst, imm32);
}
}
void MacroAssembler::testq(Register dst, int32_t imm32) {
if (imm32 >= 0) {
testl(dst, imm32);
} else {
Assembler::testq(dst, imm32);
}
}
#endif
void MacroAssembler::pcmpeqb(XMMRegister dst, XMMRegister src) {
assert(((dst->encoding() < 16 && src->encoding() < 16) || VM_Version::supports_avx512vlbw()),"XMM register should be 0-15");
Assembler::pcmpeqb(dst, src);

5
src/hotspot/cpu/x86/macroAssembler_x86.hpp
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@ -831,7 +831,12 @@ public:
// Import other testl() methods from the parent class or else
// they will be hidden by the following overriding declaration.
using Assembler::testl;
void testl(Address dst, int32_t imm32);
void testl(Register dst, int32_t imm32);
void testl(Register dst, AddressLiteral src); // requires reachable address
using Assembler::testq;
void testq(Address dst, int32_t imm32);
void testq(Register dst, int32_t imm32);
void orptr(Register dst, Address src) { LP64_ONLY(orq(dst, src)) NOT_LP64(orl(dst, src)); }
void orptr(Register dst, Register src) { LP64_ONLY(orq(dst, src)) NOT_LP64(orl(dst, src)); }