8331281: RISC-V: C2: Support vector-scalar and vector-immediate bitwise logic instructions
Reviewed-by: fjiang, fyang
This commit is contained in:
Gui Cao
Ludovic Henry
parent
44bdf9964e
commit
e611151796
@ -2150,11 +2150,44 @@ bool size_fits_all_mem_uses(AddPNode* addp, int shift) {
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return true;
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}
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// Binary src (Replicate scalar/immediate)
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static bool is_vector_scalar_bitwise_pattern(Node* n, Node* m) {
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if (n == nullptr || m == nullptr) {
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return false;
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}
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if (m->Opcode() != Op_Replicate) {
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return false;
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}
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switch (n->Opcode()) {
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case Op_AndV:
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case Op_OrV:
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case Op_XorV: {
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return true;
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}
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default:
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return false;
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}
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}
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// (XorV src (Replicate m1))
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// (XorVMask src (MaskAll m1))
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static bool is_vector_bitwise_not_pattern(Node* n, Node* m) {
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if (n != nullptr && m != nullptr) {
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return (n->Opcode() == Op_XorV || n->Opcode() == Op_XorVMask) &&
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VectorNode::is_all_ones_vector(m);
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}
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return false;
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}
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// Should the Matcher clone input 'm' of node 'n'?
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bool Matcher::pd_clone_node(Node* n, Node* m, Matcher::MStack& mstack) {
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assert_cond(m != nullptr);
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if (is_vshift_con_pattern(n, m)) { // ShiftV src (ShiftCntV con)
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mstack.push(m, Visit); // m = ShiftCntV
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if (is_vshift_con_pattern(n, m) || // ShiftV src (ShiftCntV con)
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is_vector_bitwise_not_pattern(n, m) ||
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is_vector_scalar_bitwise_pattern(n, m)) {
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mstack.push(m, Visit);
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return true;
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}
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return false;
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@ -483,6 +483,130 @@ instruct vand_masked(vReg dst_src1, vReg src2, vRegMask_V0 v0) %{
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ins_pipe(pipe_slow);
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%}
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// vector-immediate and (unpredicated)
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instruct vand_immI(vReg dst_src, immI5 con) %{
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predicate(Matcher::vector_element_basic_type(n) == T_INT ||
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Matcher::vector_element_basic_type(n) == T_BYTE ||
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Matcher::vector_element_basic_type(n) == T_SHORT);
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match(Set dst_src (AndV dst_src (Replicate con)));
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format %{ "vand_immI $dst_src, $dst_src, $con" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ vsetvli_helper(bt, Matcher::vector_length(this));
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__ vand_vi(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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$con$$constant);
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%}
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ins_pipe(pipe_slow);
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%}
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instruct vand_immL(vReg dst_src, immL5 con) %{
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predicate(Matcher::vector_element_basic_type(n) == T_LONG);
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match(Set dst_src (AndV dst_src (Replicate con)));
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format %{ "vand_immL $dst_src, $dst_src, $con" %}
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ins_encode %{
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__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
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__ vand_vi(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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$con$$constant);
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%}
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ins_pipe(pipe_slow);
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%}
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// vector-scalar and (unpredicated)
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instruct vand_regI(vReg dst_src, iRegIorL2I src) %{
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predicate(Matcher::vector_element_basic_type(n) == T_INT ||
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Matcher::vector_element_basic_type(n) == T_BYTE ||
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Matcher::vector_element_basic_type(n) == T_SHORT);
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match(Set dst_src (AndV dst_src (Replicate src)));
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format %{ "vand_regI $dst_src, $dst_src, $src" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ vsetvli_helper(bt, Matcher::vector_length(this));
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__ vand_vx(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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as_Register($src$$reg));
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%}
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ins_pipe(pipe_slow);
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%}
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instruct vand_regL(vReg dst_src, iRegL src) %{
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predicate(Matcher::vector_element_basic_type(n) == T_LONG);
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match(Set dst_src (AndV dst_src (Replicate src)));
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format %{ "vand_regL $dst_src, $dst_src, $src" %}
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ins_encode %{
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__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
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__ vand_vx(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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as_Register($src$$reg));
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%}
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ins_pipe(pipe_slow);
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%}
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// vector-immediate and (predicated)
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instruct vand_immI_masked(vReg dst_src, immI5 con, vRegMask_V0 v0) %{
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predicate(Matcher::vector_element_basic_type(n) == T_INT ||
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Matcher::vector_element_basic_type(n) == T_BYTE ||
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Matcher::vector_element_basic_type(n) == T_SHORT);
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match(Set dst_src (AndV (Binary dst_src (Replicate con)) v0));
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format %{ "vand_immI_masked $dst_src, $dst_src, $con" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ vsetvli_helper(bt, Matcher::vector_length(this));
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__ vand_vi(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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$con$$constant, Assembler::v0_t);
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%}
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ins_pipe(pipe_slow);
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%}
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instruct vand_immL_masked(vReg dst_src, immL5 con, vRegMask_V0 v0) %{
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predicate(Matcher::vector_element_basic_type(n) == T_LONG);
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match(Set dst_src (AndV (Binary dst_src (Replicate con)) v0));
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format %{ "vand_immL_masked $dst_src, $dst_src, $con" %}
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ins_encode %{
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__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
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__ vand_vi(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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$con$$constant, Assembler::v0_t);
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%}
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ins_pipe(pipe_slow);
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%}
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// vector-scalar and (predicated)
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instruct vand_regI_masked(vReg dst_src, iRegIorL2I src, vRegMask_V0 v0) %{
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predicate(Matcher::vector_element_basic_type(n) == T_INT ||
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Matcher::vector_element_basic_type(n) == T_BYTE ||
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Matcher::vector_element_basic_type(n) == T_SHORT);
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match(Set dst_src (AndV (Binary dst_src (Replicate src)) v0));
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format %{ "vand_regI_masked $dst_src, $dst_src, $src" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ vsetvli_helper(bt, Matcher::vector_length(this));
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__ vand_vx(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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as_Register($src$$reg), Assembler::v0_t);
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%}
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ins_pipe(pipe_slow);
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%}
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instruct vand_regL_masked(vReg dst_src, iRegL src, vRegMask_V0 v0) %{
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predicate(Matcher::vector_element_basic_type(n) == T_LONG);
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match(Set dst_src (AndV (Binary dst_src (Replicate src)) v0));
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format %{ "vand_regL_masked $dst_src, $dst_src, $src" %}
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ins_encode %{
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__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
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__ vand_vx(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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as_Register($src$$reg), Assembler::v0_t);
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%}
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ins_pipe(pipe_slow);
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%}
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// vector or
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instruct vor(vReg dst, vReg src1, vReg src2) %{
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@ -515,6 +639,130 @@ instruct vor_masked(vReg dst_src1, vReg src2, vRegMask_V0 v0) %{
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ins_pipe(pipe_slow);
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%}
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// vector-immediate or (unpredicated)
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instruct vor_immI(vReg dst_src, immI5 con) %{
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predicate(Matcher::vector_element_basic_type(n) == T_INT ||
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Matcher::vector_element_basic_type(n) == T_BYTE ||
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Matcher::vector_element_basic_type(n) == T_SHORT);
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match(Set dst_src (OrV dst_src (Replicate con)));
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format %{ "vor_immI $dst_src, $dst_src, $con" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ vsetvli_helper(bt, Matcher::vector_length(this));
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__ vor_vi(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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$con$$constant);
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%}
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ins_pipe(pipe_slow);
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%}
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instruct vor_immL(vReg dst_src, immL5 con) %{
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predicate(Matcher::vector_element_basic_type(n) == T_LONG);
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match(Set dst_src (OrV dst_src (Replicate con)));
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format %{ "vor_immL $dst_src, $dst_src, $con" %}
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ins_encode %{
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__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
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__ vor_vi(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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$con$$constant);
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%}
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ins_pipe(pipe_slow);
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%}
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// vector-scalar or (unpredicated)
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instruct vor_regI(vReg dst_src, iRegIorL2I src) %{
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predicate(Matcher::vector_element_basic_type(n) == T_INT ||
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Matcher::vector_element_basic_type(n) == T_BYTE ||
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Matcher::vector_element_basic_type(n) == T_SHORT);
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match(Set dst_src (OrV dst_src (Replicate src)));
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format %{ "vor_regI $dst_src, $dst_src, $src" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ vsetvli_helper(bt, Matcher::vector_length(this));
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__ vor_vx(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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as_Register($src$$reg));
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%}
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ins_pipe(pipe_slow);
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%}
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instruct vor_regL(vReg dst_src, iRegL src) %{
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predicate(Matcher::vector_element_basic_type(n) == T_LONG);
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match(Set dst_src (OrV dst_src (Replicate src)));
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format %{ "vor_regL $dst_src, $dst_src, $src" %}
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ins_encode %{
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__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
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__ vor_vx(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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as_Register($src$$reg));
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%}
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ins_pipe(pipe_slow);
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%}
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// vector-immediate or (predicated)
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instruct vor_immI_masked(vReg dst_src, immI5 con, vRegMask_V0 v0) %{
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predicate(Matcher::vector_element_basic_type(n) == T_INT ||
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Matcher::vector_element_basic_type(n) == T_BYTE ||
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Matcher::vector_element_basic_type(n) == T_SHORT);
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match(Set dst_src (OrV (Binary dst_src (Replicate con)) v0));
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format %{ "vor_immI_masked $dst_src, $dst_src, $con" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ vsetvli_helper(bt, Matcher::vector_length(this));
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__ vor_vi(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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$con$$constant, Assembler::v0_t);
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%}
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ins_pipe(pipe_slow);
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%}
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instruct vor_immL_masked(vReg dst_src, immL5 con, vRegMask_V0 v0) %{
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predicate(Matcher::vector_element_basic_type(n) == T_LONG);
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match(Set dst_src (OrV (Binary dst_src (Replicate con)) v0));
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format %{ "vor_immL_masked $dst_src, $dst_src, $con" %}
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ins_encode %{
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__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
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__ vor_vi(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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$con$$constant, Assembler::v0_t);
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%}
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ins_pipe(pipe_slow);
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%}
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// vector-scalar or (predicated)
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instruct vor_regI_masked(vReg dst_src, iRegIorL2I src, vRegMask_V0 v0) %{
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predicate(Matcher::vector_element_basic_type(n) == T_INT ||
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Matcher::vector_element_basic_type(n) == T_BYTE ||
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Matcher::vector_element_basic_type(n) == T_SHORT);
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match(Set dst_src (OrV (Binary dst_src (Replicate src)) v0));
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format %{ "vor_regI_masked $dst_src, $dst_src, $src" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ vsetvli_helper(bt, Matcher::vector_length(this));
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__ vor_vx(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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as_Register($src$$reg), Assembler::v0_t);
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%}
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ins_pipe(pipe_slow);
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%}
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instruct vor_regL_masked(vReg dst_src, iRegL src, vRegMask_V0 v0) %{
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predicate(Matcher::vector_element_basic_type(n) == T_LONG);
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match(Set dst_src (OrV (Binary dst_src (Replicate src)) v0));
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format %{ "vor_regL_masked $dst_src, $dst_src, $src" %}
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ins_encode %{
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__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
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__ vor_vx(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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as_Register($src$$reg), Assembler::v0_t);
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%}
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ins_pipe(pipe_slow);
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%}
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// vector xor
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instruct vxor(vReg dst, vReg src1, vReg src2) %{
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@ -547,6 +795,194 @@ instruct vxor_masked(vReg dst_src1, vReg src2, vRegMask_V0 v0) %{
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ins_pipe(pipe_slow);
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%}
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// vector-immediate xor (unpredicated)
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instruct vxor_immI(vReg dst_src, immI5 con) %{
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predicate(Matcher::vector_element_basic_type(n) == T_INT ||
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Matcher::vector_element_basic_type(n) == T_BYTE ||
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Matcher::vector_element_basic_type(n) == T_SHORT);
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match(Set dst_src (XorV dst_src (Replicate con)));
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format %{ "vxor_immI $dst_src, $dst_src, $con" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ vsetvli_helper(bt, Matcher::vector_length(this));
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__ vxor_vi(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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$con$$constant);
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%}
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ins_pipe(pipe_slow);
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%}
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instruct vxor_immL(vReg dst_src, immL5 con) %{
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predicate(Matcher::vector_element_basic_type(n) == T_LONG);
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match(Set dst_src (XorV dst_src (Replicate con)));
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format %{ "vxor_immL $dst_src, $dst_src, $con" %}
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ins_encode %{
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__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
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__ vxor_vi(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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$con$$constant);
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%}
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ins_pipe(pipe_slow);
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%}
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// vector-scalar xor (unpredicated)
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instruct vxor_regI(vReg dst_src, iRegIorL2I src) %{
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predicate(Matcher::vector_element_basic_type(n) == T_INT ||
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Matcher::vector_element_basic_type(n) == T_BYTE ||
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Matcher::vector_element_basic_type(n) == T_SHORT);
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match(Set dst_src (XorV dst_src (Replicate src)));
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format %{ "vxor_regI $dst_src, $dst_src, $src" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ vsetvli_helper(bt, Matcher::vector_length(this));
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__ vxor_vx(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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as_Register($src$$reg));
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%}
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ins_pipe(pipe_slow);
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%}
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instruct vxor_regL(vReg dst_src, iRegL src) %{
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predicate(Matcher::vector_element_basic_type(n) == T_LONG);
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match(Set dst_src (XorV dst_src (Replicate src)));
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format %{ "vxor_regL $dst_src, $dst_src, $src" %}
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ins_encode %{
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__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
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__ vxor_vx(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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as_Register($src$$reg));
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%}
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ins_pipe(pipe_slow);
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%}
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// vector-immediate xor (predicated)
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instruct vxor_immI_masked(vReg dst_src, immI5 con, vRegMask_V0 v0) %{
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predicate(Matcher::vector_element_basic_type(n) == T_INT ||
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Matcher::vector_element_basic_type(n) == T_BYTE ||
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Matcher::vector_element_basic_type(n) == T_SHORT);
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match(Set dst_src (XorV (Binary dst_src (Replicate con)) v0));
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format %{ "vxor_immI_masked $dst_src, $dst_src, $con" %}
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ins_encode %{
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BasicType bt = Matcher::vector_element_basic_type(this);
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__ vsetvli_helper(bt, Matcher::vector_length(this));
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__ vxor_vi(as_VectorRegister($dst_src$$reg),
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as_VectorRegister($dst_src$$reg),
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$con$$constant, Assembler::v0_t);
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%}
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ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct vxor_immL_masked(vReg dst_src, immL5 con, vRegMask_V0 v0) %{
|
||||
predicate(Matcher::vector_element_basic_type(n) == T_LONG);
|
||||
match(Set dst_src (XorV (Binary dst_src (Replicate con)) v0));
|
||||
format %{ "vxor_immL_masked $dst_src, $dst_src, $con" %}
|
||||
ins_encode %{
|
||||
__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
|
||||
__ vxor_vi(as_VectorRegister($dst_src$$reg),
|
||||
as_VectorRegister($dst_src$$reg),
|
||||
$con$$constant, Assembler::v0_t);
|
||||
%}
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
// vector-scalar xor (predicated)
|
||||
|
||||
instruct vxor_regI_masked(vReg dst_src, iRegIorL2I src, vRegMask_V0 v0) %{
|
||||
predicate(Matcher::vector_element_basic_type(n) == T_INT ||
|
||||
Matcher::vector_element_basic_type(n) == T_BYTE ||
|
||||
Matcher::vector_element_basic_type(n) == T_SHORT);
|
||||
match(Set dst_src (XorV (Binary dst_src (Replicate src)) v0));
|
||||
format %{ "vxor_regI_masked $dst_src, $dst_src, $src" %}
|
||||
ins_encode %{
|
||||
BasicType bt = Matcher::vector_element_basic_type(this);
|
||||
__ vsetvli_helper(bt, Matcher::vector_length(this));
|
||||
__ vxor_vx(as_VectorRegister($dst_src$$reg),
|
||||
as_VectorRegister($dst_src$$reg),
|
||||
as_Register($src$$reg), Assembler::v0_t);
|
||||
%}
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct vxor_regL_masked(vReg dst_src, iRegL src, vRegMask_V0 v0) %{
|
||||
predicate(Matcher::vector_element_basic_type(n) == T_LONG);
|
||||
match(Set dst_src (XorV (Binary dst_src (Replicate src)) v0));
|
||||
format %{ "vxor_regL_masked $dst_src, $dst_src, $src" %}
|
||||
ins_encode %{
|
||||
__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
|
||||
__ vxor_vx(as_VectorRegister($dst_src$$reg),
|
||||
as_VectorRegister($dst_src$$reg),
|
||||
as_Register($src$$reg), Assembler::v0_t);
|
||||
%}
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
// ------------------------------ Vector not -----------------------------------
|
||||
|
||||
// vector not
|
||||
|
||||
instruct vnotI(vReg dst, vReg src, immI_M1 m1) %{
|
||||
predicate(Matcher::vector_element_basic_type(n) == T_INT ||
|
||||
Matcher::vector_element_basic_type(n) == T_BYTE ||
|
||||
Matcher::vector_element_basic_type(n) == T_SHORT);
|
||||
match(Set dst (XorV src (Replicate m1)));
|
||||
format %{ "vnotI $dst, $src" %}
|
||||
ins_encode %{
|
||||
BasicType bt = Matcher::vector_element_basic_type(this);
|
||||
__ vsetvli_helper(bt, Matcher::vector_length(this));
|
||||
__ vxor_vi(as_VectorRegister($dst$$reg),
|
||||
as_VectorRegister($src$$reg),
|
||||
-1);
|
||||
%}
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct vnotL(vReg dst, vReg src, immL_M1 m1) %{
|
||||
predicate(Matcher::vector_element_basic_type(n) == T_LONG);
|
||||
match(Set dst (XorV src (Replicate m1)));
|
||||
format %{ "vnotL $dst, $src" %}
|
||||
ins_encode %{
|
||||
__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
|
||||
__ vxor_vi(as_VectorRegister($dst$$reg),
|
||||
as_VectorRegister($src$$reg),
|
||||
-1);
|
||||
%}
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
// vector not - predicated
|
||||
|
||||
instruct vnotI_masked(vReg dst_src, immI_M1 m1, vRegMask_V0 v0) %{
|
||||
predicate(Matcher::vector_element_basic_type(n) == T_INT ||
|
||||
Matcher::vector_element_basic_type(n) == T_BYTE ||
|
||||
Matcher::vector_element_basic_type(n) == T_SHORT);
|
||||
match(Set dst_src (XorV (Binary dst_src (Replicate m1)) v0));
|
||||
format %{ "vnotI_masked $dst_src, $dst_src, $v0" %}
|
||||
ins_encode %{
|
||||
BasicType bt = Matcher::vector_element_basic_type(this);
|
||||
__ vsetvli_helper(bt, Matcher::vector_length(this));
|
||||
__ vxor_vi(as_VectorRegister($dst_src$$reg),
|
||||
as_VectorRegister($dst_src$$reg),
|
||||
-1, Assembler::v0_t);
|
||||
%}
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
instruct vnotL_masked(vReg dst_src, immI_M1 m1, vRegMask_V0 v0) %{
|
||||
predicate(Matcher::vector_element_basic_type(n) == T_LONG);
|
||||
match(Set dst_src (XorV (Binary dst_src (Replicate m1)) v0));
|
||||
format %{ "vnotL_masked $dst_src, $dst_src, $v0" %}
|
||||
ins_encode %{
|
||||
__ vsetvli_helper(T_LONG, Matcher::vector_length(this));
|
||||
__ vxor_vi(as_VectorRegister($dst_src$$reg),
|
||||
as_VectorRegister($dst_src$$reg),
|
||||
-1, Assembler::v0_t);
|
||||
%}
|
||||
ins_pipe(pipe_slow);
|
||||
%}
|
||||
|
||||
// vector float div
|
||||
|
||||
instruct vdiv_fp(vReg dst, vReg src1, vReg src2) %{
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user