8322880: Eliminate -Wparentheses warnings in arm32 code
Reviewed-by: shade, dholmes
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@ -1,5 +1,5 @@
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//
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// Copyright (c) 2008, 2023, Oracle and/or its affiliates. All rights reserved.
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// Copyright (c) 2008, 2024, Oracle and/or its affiliates. All rights reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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//
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// This code is free software; you can redistribute it and/or modify it
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@ -9193,7 +9193,7 @@ instruct clear_array(iRegX cnt, iRegP base, iRegI temp, iRegX zero, Universe dum
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ins_encode %{
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__ mov($zero$$Register, 0);
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__ mov($temp$$Register, $cnt$$Register);
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Label(loop);
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Label loop;
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__ bind(loop);
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__ subs($temp$$Register, $temp$$Register, 4);
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__ str($zero$$Register, Address($base$$Register, $temp$$Register), ge);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2008, 2023, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2008, 2024, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -175,7 +175,7 @@ class Address {
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if (_index == noreg) {
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assert(-256 < _disp && _disp < 256, "encoding constraint");
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return _mode | up(_disp) << 23 | 1 << 22 | _base->encoding() << 16 |
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(abs(_disp) & 0xf0) << 4 | abs(_disp) & 0x0f;
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(abs(_disp) & 0xf0) << 4 | (abs(_disp) & 0x0f);
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} else {
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assert(_index != PC && (_mode == basic_offset || _index != _base), "unpredictable instruction");
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assert(_disp == 0 && _shift == lsl && _shift_imm == 0, "encoding constraint");
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2008, 2023, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2008, 2024, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -2640,8 +2640,8 @@ void LIR_Assembler::rt_call(LIR_Opr result, address dest, const LIR_OprList* arg
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void LIR_Assembler::volatile_move_op(LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info) {
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assert(src->is_double_cpu() && dest->is_address() ||
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src->is_address() && dest->is_double_cpu(),
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assert((src->is_double_cpu() && dest->is_address()) ||
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(src->is_address() && dest->is_double_cpu()),
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"Simple move_op is called for all other cases");
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int null_check_offset;
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2008, 2023, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2008, 2024, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -93,7 +93,7 @@ inline bool frame::equal(frame other) const {
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&& unextended_sp() == other.unextended_sp()
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&& fp() == other.fp()
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&& pc() == other.pc();
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assert(!ret || ret && cb() == other.cb() && _deopt_state == other._deopt_state, "inconsistent construction");
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assert(!ret || (cb() == other.cb() && _deopt_state == other._deopt_state), "inconsistent construction");
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return ret;
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2008, 2023, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2008, 2024, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -162,7 +162,7 @@ void NativeMovConstReg::set_data(intptr_t x, address pc) {
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unsigned int hi = (unsigned int)(x >> 16);
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this->set_encoding((this->encoding() & 0xfff0f000) | (lo & 0xf000) << 4 | (lo & 0xfff));
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next->set_encoding((next->encoding() & 0xfff0f000) | (hi & 0xf000) << 4 | (hi & 0xfff));
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} else if (oop_addr == nullptr & metadata_addr == nullptr) {
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} else if (oop_addr == nullptr && metadata_addr == nullptr) {
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// A static ldr_literal (without oop or metadata relocation)
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assert(is_ldr_literal(), "must be");
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int offset = ldr_offset();
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2008, 2023, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2008, 2024, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -396,7 +396,7 @@ class NativeMovConstReg: public NativeInstruction {
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inline NativeMovConstReg* nativeMovConstReg_at(address address) {
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NativeInstruction* ni = nativeInstruction_at(address);
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assert(ni->is_ldr_literal() || ni->is_pc_rel() ||
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ni->is_movw() && VM_Version::supports_movw(), "must be");
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(ni->is_movw() && VM_Version::supports_movw()), "must be");
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return (NativeMovConstReg*)address;
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}
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