From ea98de63f7aa4b9d7f95bea267a43619c5ce449e Mon Sep 17 00:00:00 2001 From: Tobias Hartmann Date: Wed, 14 Feb 2024 07:34:28 +0000 Subject: [PATCH] 8325449: [BACKOUT] use "dmb.ishst+dmb.ishld" for release barrier Reviewed-by: chagedorn --- src/hotspot/cpu/aarch64/aarch64.ad | 7 +- src/hotspot/cpu/aarch64/globals_aarch64.hpp | 2 - .../cpu/aarch64/macroAssembler_aarch64.cpp | 21 ++--- .../cpu/aarch64/vm_version_aarch64.cpp | 3 - .../vm/compiler/FinalFieldInitialize.java | 85 ------------------- 5 files changed, 10 insertions(+), 108 deletions(-) delete mode 100644 test/micro/org/openjdk/bench/vm/compiler/FinalFieldInitialize.java diff --git a/src/hotspot/cpu/aarch64/aarch64.ad b/src/hotspot/cpu/aarch64/aarch64.ad index f22af58f40a..9c015bd16da 100644 --- a/src/hotspot/cpu/aarch64/aarch64.ad +++ b/src/hotspot/cpu/aarch64/aarch64.ad @@ -8289,7 +8289,7 @@ instruct membar_acquire() %{ ins_cost(VOLATILE_REF_COST); format %{ "membar_acquire\n\t" - "dmb ishld" %} + "dmb ish" %} ins_encode %{ __ block_comment("membar_acquire"); @@ -8343,12 +8343,11 @@ instruct membar_release() %{ ins_cost(VOLATILE_REF_COST); format %{ "membar_release\n\t" - "dmb ishst\n\tdmb ishld" %} + "dmb ish" %} ins_encode %{ __ block_comment("membar_release"); - __ membar(Assembler::StoreStore); - __ membar(Assembler::LoadStore); + __ membar(Assembler::LoadStore|Assembler::StoreStore); %} ins_pipe(pipe_serial); %} diff --git a/src/hotspot/cpu/aarch64/globals_aarch64.hpp b/src/hotspot/cpu/aarch64/globals_aarch64.hpp index 13f2e4b61b9..293cc6eb0d0 100644 --- a/src/hotspot/cpu/aarch64/globals_aarch64.hpp +++ b/src/hotspot/cpu/aarch64/globals_aarch64.hpp @@ -127,8 +127,6 @@ define_pd_global(intx, InlineSmallCode, 1000); range(1, 99) \ product(ccstr, UseBranchProtection, "none", \ "Branch Protection to use: none, standard, pac-ret") \ - product(bool, AlwaysMergeDMB, false, DIAGNOSTIC, \ - "Always merge DMB instructions in code emission") \ // end of ARCH_FLAGS diff --git a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp index 124af3bafbe..60de130bc33 100644 --- a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp @@ -2066,21 +2066,14 @@ void MacroAssembler::membar(Membar_mask_bits order_constraint) { address last = code()->last_insn(); if (last != nullptr && nativeInstruction_at(last)->is_Membar() && prev == last) { NativeMembar *bar = NativeMembar_at(prev); - // Don't promote DMB ST|DMB LD to DMB (a full barrier) because - // doing so would introduce a StoreLoad which the caller did not - // intend - if (AlwaysMergeDMB || bar->get_kind() == order_constraint - || bar->get_kind() == AnyAny - || order_constraint == AnyAny) { - // We are merging two memory barrier instructions. On AArch64 we - // can do this simply by ORing them together. - bar->set_kind(bar->get_kind() | order_constraint); - BLOCK_COMMENT("merged membar"); - return; - } + // We are merging two memory barrier instructions. On AArch64 we + // can do this simply by ORing them together. + bar->set_kind(bar->get_kind() | order_constraint); + BLOCK_COMMENT("merged membar"); + } else { + code()->set_last_insn(pc()); + dmb(Assembler::barrier(order_constraint)); } - code()->set_last_insn(pc()); - dmb(Assembler::barrier(order_constraint)); } bool MacroAssembler::try_merge_ldst(Register rt, const Address &adr, size_t size_in_bytes, bool is_store) { diff --git a/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp b/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp index b53e4276497..18f310c746c 100644 --- a/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp @@ -191,9 +191,6 @@ void VM_Version::initialize() { if (FLAG_IS_DEFAULT(UseSIMDForMemoryOps)) { FLAG_SET_DEFAULT(UseSIMDForMemoryOps, true); } - if (FLAG_IS_DEFAULT(AlwaysMergeDMB)) { - FLAG_SET_DEFAULT(AlwaysMergeDMB, true); - } } // Cortex A53 diff --git a/test/micro/org/openjdk/bench/vm/compiler/FinalFieldInitialize.java b/test/micro/org/openjdk/bench/vm/compiler/FinalFieldInitialize.java deleted file mode 100644 index ee0779faecf..00000000000 --- a/test/micro/org/openjdk/bench/vm/compiler/FinalFieldInitialize.java +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (c) 2024, Alibaba Group Co., Ltd. All rights reserved. - * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. - * - * This code is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 only, as - * published by the Free Software Foundation. - * - * This code is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * version 2 for more details (a copy is included in the LICENSE file that - * accompanied this code). - * - * You should have received a copy of the GNU General Public License version - * 2 along with this work; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. - * - * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA - * or visit www.oracle.com if you need additional information or have any - * questions. - */ -package org.openjdk.bench.vm.compiler; - -import org.openjdk.jmh.annotations.Benchmark; -import org.openjdk.jmh.annotations.*; - -import java.util.concurrent.TimeUnit; -import org.openjdk.jmh.infra.Blackhole; - -/* test allocation speed of object with final field */ -@BenchmarkMode(Mode.Throughput) -@OutputTimeUnit(TimeUnit.SECONDS) -@State(Scope.Benchmark) -@Warmup(iterations = 5, time = 3, timeUnit = TimeUnit.SECONDS) -@Measurement(iterations = 3, time = 3, timeUnit = TimeUnit.SECONDS) -@Fork(value = 3) -public class FinalFieldInitialize { - final static int LEN = 100_000; - Object arr[] = null; - @Setup - public void setup(){ - arr = new Object[LEN]; - } - - @Benchmark - public void testAlloc(Blackhole bh) { - for (int i=0; i