8210578: AArch64: Invalid encoding for fmlsvs instruction

Sub_op code for fmslvs should be 1 not 0 Reviewed-by: roland
2018-09-12 09:12:42 +01:00 · 2018-09-12 09:12:42 +01:00 · ef320b7a99
commit ef320b7a99
parent 8e0e188abd
1 changed files with 1 additions and 1 deletions
--- a/src/hotspot/cpu/aarch64/assembler_aarch64.hpp
+++ b/src/hotspot/cpu/aarch64/assembler_aarch64.hpp
@ -2356,7 +2356,7 @@ public:

  // FMLA/FMLS - Vector - Scalar
  INSN(fmlavs, 0, 0b0001);
-  INSN(fmlsvs, 0, 0b0001);
+  INSN(fmlsvs, 0, 0b0101);
  // FMULX - Vector - Scalar
  INSN(fmulxvs, 1, 0b1001);