8248411: [aarch64] Insufficient error handling when CodeBuffer is exhausted
Reviewed-by: adinn
This commit is contained in:
parent
4634dbef6d
commit
f279ddfa06
@ -3765,12 +3765,19 @@ encode %{
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if (!_method) {
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// A call to a runtime wrapper, e.g. new, new_typeArray_Java, uncommon_trap.
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call = __ trampoline_call(Address(addr, relocInfo::runtime_call_type), &cbuf);
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if (call == NULL) {
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ciEnv::current()->record_failure("CodeCache is full");
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return;
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}
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} else {
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int method_index = resolved_method_index(cbuf);
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RelocationHolder rspec = _optimized_virtual ? opt_virtual_call_Relocation::spec(method_index)
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: static_call_Relocation::spec(method_index);
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call = __ trampoline_call(Address(addr, rspec), &cbuf);
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if (call == NULL) {
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ciEnv::current()->record_failure("CodeCache is full");
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return;
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}
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// Emit stub for static call
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address stub = CompiledStaticCall::emit_to_interp_stub(cbuf);
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if (stub == NULL) {
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@ -3778,10 +3785,8 @@ encode %{
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return;
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}
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}
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if (call == NULL) {
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ciEnv::current()->record_failure("CodeCache is full");
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return;
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} else if (UseSVE > 0 && Compile::current()->max_vector_size() >= 16) {
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if (UseSVE > 0 && Compile::current()->max_vector_size() >= 16) {
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// Only non uncommon_trap calls need to reinitialize ptrue.
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if (uncommon_trap_request() == 0) {
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__ reinitialize_ptrue();
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@ -14725,7 +14730,11 @@ instruct clearArray_reg_reg(iRegL_R11 cnt, iRegP_R10 base, Universe dummy, rFlag
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format %{ "ClearArray $cnt, $base" %}
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ins_encode %{
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__ zero_words($base$$Register, $cnt$$Register);
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address tpc = __ zero_words($base$$Register, $cnt$$Register);
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if (tpc == NULL) {
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ciEnv::current()->record_failure("CodeCache is full");
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return;
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}
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%}
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ins_pipe(pipe_class_memory);
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@ -16003,8 +16012,8 @@ instruct CallStaticJavaDirect(method meth)
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format %{ "call,static $meth \t// ==> " %}
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ins_encode( aarch64_enc_java_static_call(meth),
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aarch64_enc_call_epilog );
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ins_encode(aarch64_enc_java_static_call(meth),
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aarch64_enc_call_epilog);
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ins_pipe(pipe_class_call);
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%}
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@ -16022,8 +16031,8 @@ instruct CallDynamicJavaDirect(method meth)
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format %{ "CALL,dynamic $meth \t// ==> " %}
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ins_encode( aarch64_enc_java_dynamic_call(meth),
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aarch64_enc_call_epilog );
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ins_encode(aarch64_enc_java_dynamic_call(meth),
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aarch64_enc_call_epilog);
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ins_pipe(pipe_class_call);
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%}
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@ -16489,10 +16498,14 @@ instruct array_equalsB(iRegP_R1 ary1, iRegP_R2 ary2, iRegI_R0 result,
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format %{ "Array Equals $ary1,ary2 -> $result // KILL $tmp" %}
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ins_encode %{
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__ arrays_equals($ary1$$Register, $ary2$$Register,
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$tmp1$$Register, $tmp2$$Register, $tmp3$$Register,
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$result$$Register, $tmp$$Register, 1);
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%}
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address tpc = __ arrays_equals($ary1$$Register, $ary2$$Register,
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$tmp1$$Register, $tmp2$$Register, $tmp3$$Register,
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$result$$Register, $tmp$$Register, 1);
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if (tpc == NULL) {
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ciEnv::current()->record_failure("CodeCache is full");
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return;
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}
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%}
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ins_pipe(pipe_class_memory);
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%}
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@ -16506,9 +16519,13 @@ instruct array_equalsC(iRegP_R1 ary1, iRegP_R2 ary2, iRegI_R0 result,
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format %{ "Array Equals $ary1,ary2 -> $result // KILL $tmp" %}
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ins_encode %{
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__ arrays_equals($ary1$$Register, $ary2$$Register,
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$tmp1$$Register, $tmp2$$Register, $tmp3$$Register,
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$result$$Register, $tmp$$Register, 2);
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address tpc = __ arrays_equals($ary1$$Register, $ary2$$Register,
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$tmp1$$Register, $tmp2$$Register, $tmp3$$Register,
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$result$$Register, $tmp$$Register, 2);
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if (tpc == NULL) {
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ciEnv::current()->record_failure("CodeCache is full");
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return;
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}
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%}
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ins_pipe(pipe_class_memory);
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%}
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@ -16519,7 +16536,11 @@ instruct has_negatives(iRegP_R1 ary1, iRegI_R2 len, iRegI_R0 result, rFlagsReg c
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effect(USE_KILL ary1, USE_KILL len, KILL cr);
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format %{ "has negatives byte[] $ary1,$len -> $result" %}
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ins_encode %{
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__ has_negatives($ary1$$Register, $len$$Register, $result$$Register);
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address tpc = __ has_negatives($ary1$$Register, $len$$Register, $result$$Register);
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if (tpc == NULL) {
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ciEnv::current()->record_failure("CodeCache is full");
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return;
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}
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%}
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ins_pipe( pipe_slow );
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%}
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@ -16552,8 +16573,13 @@ instruct string_inflate(Universe dummy, iRegP_R0 src, iRegP_R1 dst, iRegI_R2 len
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format %{ "String Inflate $src,$dst // KILL $tmp1, $tmp2" %}
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ins_encode %{
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__ byte_array_inflate($src$$Register, $dst$$Register, $len$$Register,
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$tmp1$$FloatRegister, $tmp2$$FloatRegister, $tmp3$$FloatRegister, $tmp4$$Register);
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address tpc = __ byte_array_inflate($src$$Register, $dst$$Register, $len$$Register,
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$tmp1$$FloatRegister, $tmp2$$FloatRegister,
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$tmp3$$FloatRegister, $tmp4$$Register);
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if (tpc == NULL) {
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ciEnv::current()->record_failure("CodeCache is full");
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return;
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}
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%}
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ins_pipe(pipe_class_memory);
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%}
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@ -36,6 +36,9 @@
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#define __ _masm.
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address CompiledStaticCall::emit_to_interp_stub(CodeBuffer &cbuf, address mark) {
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precond(cbuf.stubs()->start() != badAddress);
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precond(cbuf.stubs()->end() != badAddress);
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// Stub is fixed up when the corresponding call is converted from
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// calling compiled code to calling interpreted code.
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// mov rmethod, 0
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@ -705,7 +705,7 @@ void MacroAssembler::call_VM_helper(Register oop_result, address entry_point, in
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// Maybe emit a call via a trampoline. If the code cache is small
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// trampolines won't be emitted.
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address MacroAssembler::trampoline_call(Address entry, CodeBuffer *cbuf) {
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address MacroAssembler::trampoline_call(Address entry, CodeBuffer* cbuf) {
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assert(JavaThread::current()->is_Compiler_thread(), "just checking");
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assert(entry.rspec().type() == relocInfo::runtime_call_type
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|| entry.rspec().type() == relocInfo::opt_virtual_call_type
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@ -726,6 +726,7 @@ address MacroAssembler::trampoline_call(Address entry, CodeBuffer *cbuf) {
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if (!in_scratch_emit_size) {
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address stub = emit_trampoline_stub(offset(), entry.target());
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if (stub == NULL) {
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postcond(pc() == badAddress);
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return NULL; // CodeCache is full
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}
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}
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@ -739,6 +740,7 @@ address MacroAssembler::trampoline_call(Address entry, CodeBuffer *cbuf) {
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bl(pc());
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}
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// just need to return a non-null address
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postcond(pc() != badAddress);
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return pc();
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}
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@ -4490,7 +4492,7 @@ void MacroAssembler::remove_frame(int framesize) {
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// This method checks if provided byte array contains byte with highest bit set.
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void MacroAssembler::has_negatives(Register ary1, Register len, Register result) {
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address MacroAssembler::has_negatives(Register ary1, Register len, Register result) {
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// Simple and most common case of aligned small array which is not at the
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// end of memory page is placed here. All other cases are in stub.
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Label LOOP, END, STUB, STUB_LONG, SET_RESULT, DONE;
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@ -4527,27 +4529,38 @@ void MacroAssembler::has_negatives(Register ary1, Register len, Register result)
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b(SET_RESULT);
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BIND(STUB);
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RuntimeAddress has_neg = RuntimeAddress(StubRoutines::aarch64::has_negatives());
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RuntimeAddress has_neg = RuntimeAddress(StubRoutines::aarch64::has_negatives());
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assert(has_neg.target() != NULL, "has_negatives stub has not been generated");
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trampoline_call(has_neg);
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address tpc1 = trampoline_call(has_neg);
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if (tpc1 == NULL) {
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DEBUG_ONLY(reset_labels(STUB_LONG, SET_RESULT, DONE));
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postcond(pc() == badAddress);
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return NULL;
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}
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b(DONE);
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BIND(STUB_LONG);
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RuntimeAddress has_neg_long = RuntimeAddress(
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StubRoutines::aarch64::has_negatives_long());
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RuntimeAddress has_neg_long = RuntimeAddress(StubRoutines::aarch64::has_negatives_long());
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assert(has_neg_long.target() != NULL, "has_negatives stub has not been generated");
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trampoline_call(has_neg_long);
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address tpc2 = trampoline_call(has_neg_long);
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if (tpc2 == NULL) {
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DEBUG_ONLY(reset_labels(SET_RESULT, DONE));
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postcond(pc() == badAddress);
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return NULL;
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}
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b(DONE);
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BIND(SET_RESULT);
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cset(result, NE); // set true or false
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BIND(DONE);
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postcond(pc() != badAddress);
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return pc();
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}
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void MacroAssembler::arrays_equals(Register a1, Register a2, Register tmp3,
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Register tmp4, Register tmp5, Register result,
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Register cnt1, int elem_size) {
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address MacroAssembler::arrays_equals(Register a1, Register a2, Register tmp3,
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Register tmp4, Register tmp5, Register result,
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Register cnt1, int elem_size) {
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Label DONE, SAME;
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Register tmp1 = rscratch1;
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Register tmp2 = rscratch2;
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@ -4651,7 +4664,7 @@ void MacroAssembler::arrays_equals(Register a1, Register a2, Register tmp3,
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}
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}
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} else {
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Label NEXT_DWORD, SHORT, TAIL, TAIL2, STUB, EARLY_OUT,
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Label NEXT_DWORD, SHORT, TAIL, TAIL2, STUB,
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CSET_EQ, LAST_CHECK;
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mov(result, false);
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cbz(a1, DONE);
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@ -4710,10 +4723,14 @@ void MacroAssembler::arrays_equals(Register a1, Register a2, Register tmp3,
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cbnz(tmp5, DONE);
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RuntimeAddress stub = RuntimeAddress(StubRoutines::aarch64::large_array_equals());
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assert(stub.target() != NULL, "array_equals_long stub has not been generated");
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trampoline_call(stub);
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address tpc = trampoline_call(stub);
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if (tpc == NULL) {
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DEBUG_ONLY(reset_labels(SHORT, LAST_CHECK, CSET_EQ, SAME, DONE));
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postcond(pc() == badAddress);
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return NULL;
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}
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b(DONE);
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bind(EARLY_OUT);
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// (a1 != null && a2 == null) || (a1 != null && a2 != null && a1 == a2)
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// so, if a2 == null => return false(0), else return true, so we can return a2
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mov(result, a2);
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@ -4740,6 +4757,8 @@ void MacroAssembler::arrays_equals(Register a1, Register a2, Register tmp3,
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bind(DONE);
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BLOCK_COMMENT("} array_equals");
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postcond(pc() != badAddress);
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return pc();
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}
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// Compare Strings
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@ -4847,7 +4866,7 @@ const int MacroAssembler::zero_words_block_size = 8;
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// cnt: Count in HeapWords.
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//
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// ptr, cnt, rscratch1, and rscratch2 are clobbered.
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void MacroAssembler::zero_words(Register ptr, Register cnt)
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address MacroAssembler::zero_words(Register ptr, Register cnt)
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{
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assert(is_power_of_2(zero_words_block_size), "adjust this");
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assert(ptr == r10 && cnt == r11, "mismatch in register usage");
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@ -4857,10 +4876,15 @@ void MacroAssembler::zero_words(Register ptr, Register cnt)
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Label around;
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br(LO, around);
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{
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RuntimeAddress zero_blocks = RuntimeAddress(StubRoutines::aarch64::zero_blocks());
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RuntimeAddress zero_blocks = RuntimeAddress(StubRoutines::aarch64::zero_blocks());
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assert(zero_blocks.target() != NULL, "zero_blocks stub has not been generated");
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if (StubRoutines::aarch64::complete()) {
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trampoline_call(zero_blocks);
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address tpc = trampoline_call(zero_blocks);
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if (tpc == NULL) {
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DEBUG_ONLY(reset_labels(around));
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postcond(pc() == badAddress);
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return NULL;
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}
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} else {
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bl(zero_blocks);
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}
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@ -4881,6 +4905,8 @@ void MacroAssembler::zero_words(Register ptr, Register cnt)
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bind(l);
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}
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BLOCK_COMMENT("} zero_words");
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postcond(pc() != badAddress);
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return pc();
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}
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// base: Address of a buffer to be zeroed, 8 bytes aligned.
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@ -4893,14 +4919,15 @@ void MacroAssembler::zero_words(Register base, uint64_t cnt)
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if (i) str(zr, Address(base));
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if (cnt <= SmallArraySize / BytesPerLong) {
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for (; i < (int)cnt; i += 2)
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for (; i < (int)cnt; i += 2) {
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stp(zr, zr, Address(base, i * wordSize));
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}
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} else {
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const int unroll = 4; // Number of stp(zr, zr) instructions we'll unroll
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int remainder = cnt % (2 * unroll);
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for (; i < remainder; i += 2)
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for (; i < remainder; i += 2) {
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stp(zr, zr, Address(base, i * wordSize));
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}
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Label loop;
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Register cnt_reg = rscratch1;
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Register loop_base = rscratch2;
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@ -4910,8 +4937,9 @@ void MacroAssembler::zero_words(Register base, uint64_t cnt)
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add(loop_base, base, (remainder - 2) * wordSize);
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bind(loop);
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sub(cnt_reg, cnt_reg, 2 * unroll);
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for (i = 1; i < unroll; i++)
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for (i = 1; i < unroll; i++) {
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stp(zr, zr, Address(loop_base, 2 * i * wordSize));
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}
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stp(zr, zr, Address(pre(loop_base, 2 * unroll * wordSize)));
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cbnz(cnt_reg, loop);
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}
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@ -5127,9 +5155,9 @@ void MacroAssembler::encode_iso_array(Register src, Register dst,
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// Inflate byte[] array to char[].
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void MacroAssembler::byte_array_inflate(Register src, Register dst, Register len,
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FloatRegister vtmp1, FloatRegister vtmp2, FloatRegister vtmp3,
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Register tmp4) {
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address MacroAssembler::byte_array_inflate(Register src, Register dst, Register len,
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FloatRegister vtmp1, FloatRegister vtmp2,
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FloatRegister vtmp3, Register tmp4) {
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Label big, done, after_init, to_stub;
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assert_different_registers(src, dst, len, tmp4, rscratch1);
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@ -5166,9 +5194,14 @@ void MacroAssembler::byte_array_inflate(Register src, Register dst, Register len
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if (SoftwarePrefetchHintDistance >= 0) {
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bind(to_stub);
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RuntimeAddress stub = RuntimeAddress(StubRoutines::aarch64::large_byte_array_inflate());
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RuntimeAddress stub = RuntimeAddress(StubRoutines::aarch64::large_byte_array_inflate());
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assert(stub.target() != NULL, "large_byte_array_inflate stub has not been generated");
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trampoline_call(stub);
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address tpc = trampoline_call(stub);
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if (tpc == NULL) {
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DEBUG_ONLY(reset_labels(big, done));
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postcond(pc() == badAddress);
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return NULL;
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}
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b(after_init);
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}
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@ -5222,6 +5255,8 @@ void MacroAssembler::byte_array_inflate(Register src, Register dst, Register len
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strq(vtmp3, Address(dst, -16));
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bind(done);
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postcond(pc() != badAddress);
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return pc();
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}
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// Compress char[] array to byte[].
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@ -1062,10 +1062,24 @@ public:
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private:
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void compare_eq(Register rn, Register rm, enum operand_size size);
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#ifdef ASSERT
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// Template short-hand support to clean-up after a failed call to trampoline
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// call generation (see trampoline_call() below), when a set of Labels must
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// be reset (before returning).
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template<typename Label, typename... More>
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void reset_labels(Label &lbl, More&... more) {
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lbl.reset(); reset_labels(more...);
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}
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template<typename Label>
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void reset_labels(Label &lbl) {
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lbl.reset();
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}
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#endif
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public:
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// Calls
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address trampoline_call(Address entry, CodeBuffer *cbuf = NULL);
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address trampoline_call(Address entry, CodeBuffer* cbuf = NULL);
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static bool far_branches() {
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return ReservedCodeCacheSize > branch_range || UseAOT;
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@ -1237,24 +1251,24 @@ public:
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Register table0, Register table1, Register table2, Register table3,
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bool upper = false);
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void has_negatives(Register ary1, Register len, Register result);
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address has_negatives(Register ary1, Register len, Register result);
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void arrays_equals(Register a1, Register a2, Register result, Register cnt1,
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Register tmp1, Register tmp2, Register tmp3, int elem_size);
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address arrays_equals(Register a1, Register a2, Register result, Register cnt1,
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Register tmp1, Register tmp2, Register tmp3, int elem_size);
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void string_equals(Register a1, Register a2, Register result, Register cnt1,
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int elem_size);
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void fill_words(Register base, Register cnt, Register value);
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||||
void zero_words(Register base, uint64_t cnt);
|
||||
void zero_words(Register ptr, Register cnt);
|
||||
address zero_words(Register ptr, Register cnt);
|
||||
void zero_dcache_blocks(Register base, Register cnt);
|
||||
|
||||
static const int zero_words_block_size;
|
||||
|
||||
void byte_array_inflate(Register src, Register dst, Register len,
|
||||
FloatRegister vtmp1, FloatRegister vtmp2,
|
||||
FloatRegister vtmp3, Register tmp4);
|
||||
address byte_array_inflate(Register src, Register dst, Register len,
|
||||
FloatRegister vtmp1, FloatRegister vtmp2,
|
||||
FloatRegister vtmp3, Register tmp4);
|
||||
|
||||
void char_array_compress(Register src, Register dst, Register len,
|
||||
FloatRegister tmp1Reg, FloatRegister tmp2Reg,
|
||||
|
@ -1372,10 +1372,10 @@ void PhaseOutput::fill_buffer(CodeBuffer* cb, uint* blk_starts) {
|
||||
uint nblocks = C->cfg()->number_of_blocks();
|
||||
// Count and start of implicit null check instructions
|
||||
uint inct_cnt = 0;
|
||||
uint *inct_starts = NEW_RESOURCE_ARRAY(uint, nblocks+1);
|
||||
uint* inct_starts = NEW_RESOURCE_ARRAY(uint, nblocks+1);
|
||||
|
||||
// Count and start of calls
|
||||
uint *call_returns = NEW_RESOURCE_ARRAY(uint, nblocks+1);
|
||||
uint* call_returns = NEW_RESOURCE_ARRAY(uint, nblocks+1);
|
||||
|
||||
uint return_offset = 0;
|
||||
int nop_size = (new MachNopNode())->size(C->regalloc());
|
||||
@ -1393,7 +1393,7 @@ void PhaseOutput::fill_buffer(CodeBuffer* cb, uint* blk_starts) {
|
||||
|
||||
// Create an array of unused labels, one for each basic block, if printing is enabled
|
||||
#if defined(SUPPORT_OPTO_ASSEMBLY)
|
||||
int *node_offsets = NULL;
|
||||
int* node_offsets = NULL;
|
||||
uint node_offset_limit = C->unique();
|
||||
|
||||
if (C->print_assembly()) {
|
||||
@ -1413,15 +1413,13 @@ void PhaseOutput::fill_buffer(CodeBuffer* cb, uint* blk_starts) {
|
||||
}
|
||||
|
||||
// Create an array of labels, one for each basic block
|
||||
Label *blk_labels = NEW_RESOURCE_ARRAY(Label, nblocks+1);
|
||||
for (uint i=0; i <= nblocks; i++) {
|
||||
Label* blk_labels = NEW_RESOURCE_ARRAY(Label, nblocks+1);
|
||||
for (uint i = 0; i <= nblocks; i++) {
|
||||
blk_labels[i].init();
|
||||
}
|
||||
|
||||
// ------------------
|
||||
// Now fill in the code buffer
|
||||
Node *delay_slot = NULL;
|
||||
|
||||
Node* delay_slot = NULL;
|
||||
for (uint i = 0; i < nblocks; i++) {
|
||||
Block* block = C->cfg()->get_block(i);
|
||||
_block = block;
|
||||
@ -1678,11 +1676,12 @@ void PhaseOutput::fill_buffer(CodeBuffer* cb, uint* blk_starts) {
|
||||
node_offsets[n->_idx] = cb->insts_size();
|
||||
}
|
||||
#endif
|
||||
assert(!C->failing(), "Should not reach here if failing.");
|
||||
|
||||
// "Normal" instruction case
|
||||
DEBUG_ONLY( uint instr_offset = cb->insts_size(); )
|
||||
DEBUG_ONLY(uint instr_offset = cb->insts_size());
|
||||
n->emit(*cb, C->regalloc());
|
||||
current_offset = cb->insts_size();
|
||||
current_offset = cb->insts_size();
|
||||
|
||||
// Above we only verified that there is enough space in the instruction section.
|
||||
// However, the instruction may emit stubs that cause code buffer expansion.
|
||||
@ -1869,8 +1868,7 @@ void PhaseOutput::fill_buffer(CodeBuffer* cb, uint* blk_starts) {
|
||||
// be sure to tag this tty output with the compile ID.
|
||||
if (xtty != NULL) {
|
||||
xtty->head("opto_assembly compile_id='%d'%s", C->compile_id(),
|
||||
C->is_osr_compilation() ? " compile_kind='osr'" :
|
||||
"");
|
||||
C->is_osr_compilation() ? " compile_kind='osr'" : "");
|
||||
}
|
||||
if (C->method() != NULL) {
|
||||
tty->print_cr("----------------------- MetaData before Compile_id = %d ------------------------", C->compile_id());
|
||||
|
Loading…
Reference in New Issue
Block a user