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8296638: RISC-V: NegVI node emits wrong code when vector element basic type is T_BYTE/T_SHORT

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Reviewed-by: gcao, fyang, shade
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Dingli Zhang 2022-11-10 08:39:04 +00:00 committed by Aleksey Shipilev
parent bfc5816595
commit f2acdfdcbd
1 changed files with 9 additions and 7 deletions
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4
src/hotspot/cpu/riscv/riscv_v.ad
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@ -765,7 +765,9 @@ instruct vnegI(vReg dst, vReg src) %{
ins_cost(VEC_COST);
format %{ "vrsub.vx $dst, $src, $src\t#@vnegI" %}
ins_encode %{
__ vsetvli(t0, x0, Assembler::e32);
BasicType bt = Matcher::vector_element_basic_type(this);
Assembler::SEW sew = Assembler::elemtype_to_sew(bt);
__ vsetvli(t0, x0, sew);
__ vneg_v(as_VectorRegister($dst$$reg), as_VectorRegister($src$$reg));
%}
ins_pipe(pipe_slow);