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8311862: RISC-V: small improvements to shift immediate instructions

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Reviewed-by: luhenry, fjiang, fyang
This commit is contained in:
Ilya Gavrilin 2023-07-14 14:32:40 +00:00 committed by Vladimir Kempik
parent a63f865feb
commit f3b96f6937
1 changed files with 14 additions and 2 deletions

16
src/hotspot/cpu/riscv/assembler_riscv.hpp

@ -2787,7 +2787,13 @@ public:
c_slli(Rd, shamt); \
return; \
} \
_slli(Rd, Rs1, shamt); \
if (shamt != 0) { \
_slli(Rd, Rs1, shamt); \
} else { \
if (Rd != Rs1) { \
addi(Rd, Rs1, 0); \
} \
} \
}
INSN(slli);
@ -2802,7 +2808,13 @@ public:
C_NAME(Rd, shamt); \
return; \
} \
NORMAL_NAME(Rd, Rs1, shamt); \
if (shamt != 0) { \
NORMAL_NAME(Rd, Rs1, shamt); \
} else { \
if (Rd != Rs1) { \
addi(Rd, Rs1, 0); \
} \
} \
}
INSN(srai, c_srai, _srai);