7064302: JDK7 build 147 crashed after testing my java 6-compiled web app
Don't split CMove node if it's control edge is different from split region. Reviewed-by: never
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@ -3278,16 +3278,7 @@ void PhaseIdealLoop::build_loop_late_post( Node *n ) {
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#ifdef ASSERT
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if (legal->is_Start() && !early->is_Root()) {
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// Bad graph. Print idom path and fail.
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tty->print_cr( "Bad graph detected in build_loop_late");
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tty->print("n: ");n->dump(); tty->cr();
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tty->print("early: ");early->dump(); tty->cr();
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int ct = 0;
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Node *dbg_legal = LCA;
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while(!dbg_legal->is_Start() && ct < 100) {
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tty->print("idom[%d] ",ct); dbg_legal->dump(); tty->cr();
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ct++;
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dbg_legal = idom(dbg_legal);
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}
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dump_bad_graph(n, early, LCA);
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assert(false, "Bad graph detected in build_loop_late");
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}
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#endif
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@ -3337,6 +3328,88 @@ void PhaseIdealLoop::build_loop_late_post( Node *n ) {
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chosen_loop->_body.push(n);// Collect inner loops
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}
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#ifdef ASSERT
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void PhaseIdealLoop::dump_bad_graph(Node* n, Node* early, Node* LCA) {
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tty->print_cr( "Bad graph detected in build_loop_late");
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tty->print("n: "); n->dump();
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tty->print("early(n): "); early->dump();
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if (n->in(0) != NULL && !n->in(0)->is_top() &&
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n->in(0) != early && !n->in(0)->is_Root()) {
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tty->print("n->in(0): "); n->in(0)->dump();
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}
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for (uint i = 1; i < n->req(); i++) {
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Node* in1 = n->in(i);
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if (in1 != NULL && in1 != n && !in1->is_top()) {
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tty->print("n->in(%d): ", i); in1->dump();
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Node* in1_early = get_ctrl(in1);
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tty->print("early(n->in(%d)): ", i); in1_early->dump();
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if (in1->in(0) != NULL && !in1->in(0)->is_top() &&
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in1->in(0) != in1_early && !in1->in(0)->is_Root()) {
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tty->print("n->in(%d)->in(0): ", i); in1->in(0)->dump();
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}
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for (uint j = 1; j < in1->req(); j++) {
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Node* in2 = in1->in(j);
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if (in2 != NULL && in2 != n && in2 != in1 && !in2->is_top()) {
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tty->print("n->in(%d)->in(%d): ", i, j); in2->dump();
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Node* in2_early = get_ctrl(in2);
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tty->print("early(n->in(%d)->in(%d)): ", i, j); in2_early->dump();
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if (in2->in(0) != NULL && !in2->in(0)->is_top() &&
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in2->in(0) != in2_early && !in2->in(0)->is_Root()) {
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tty->print("n->in(%d)->in(%d)->in(0): ", i, j); in2->in(0)->dump();
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}
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}
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}
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}
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}
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tty->cr();
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tty->print("LCA(n): "); LCA->dump();
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for (uint i = 0; i < n->outcnt(); i++) {
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Node* u1 = n->raw_out(i);
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if (u1 == n)
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continue;
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tty->print("n->out(%d): ", i); u1->dump();
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if (u1->is_CFG()) {
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for (uint j = 0; j < u1->outcnt(); j++) {
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Node* u2 = u1->raw_out(j);
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if (u2 != u1 && u2 != n && u2->is_CFG()) {
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tty->print("n->out(%d)->out(%d): ", i, j); u2->dump();
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}
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}
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} else {
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Node* u1_later = get_ctrl(u1);
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tty->print("later(n->out(%d)): ", i); u1_later->dump();
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if (u1->in(0) != NULL && !u1->in(0)->is_top() &&
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u1->in(0) != u1_later && !u1->in(0)->is_Root()) {
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tty->print("n->out(%d)->in(0): ", i); u1->in(0)->dump();
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}
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for (uint j = 0; j < u1->outcnt(); j++) {
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Node* u2 = u1->raw_out(j);
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if (u2 == n || u2 == u1)
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continue;
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tty->print("n->out(%d)->out(%d): ", i, j); u2->dump();
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if (!u2->is_CFG()) {
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Node* u2_later = get_ctrl(u2);
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tty->print("later(n->out(%d)->out(%d)): ", i, j); u2_later->dump();
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if (u2->in(0) != NULL && !u2->in(0)->is_top() &&
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u2->in(0) != u2_later && !u2->in(0)->is_Root()) {
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tty->print("n->out(%d)->in(0): ", i); u2->in(0)->dump();
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}
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}
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}
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}
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}
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tty->cr();
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int ct = 0;
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Node *dbg_legal = LCA;
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while(!dbg_legal->is_Start() && ct < 100) {
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tty->print("idom[%d] ",ct); dbg_legal->dump();
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ct++;
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dbg_legal = idom(dbg_legal);
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}
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tty->cr();
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}
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#endif
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#ifndef PRODUCT
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//------------------------------dump-------------------------------------------
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void PhaseIdealLoop::dump( ) const {
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@ -1040,6 +1040,10 @@ public:
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bool created_loop_node() { return _created_loop_node; }
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void register_new_node( Node *n, Node *blk );
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#ifdef ASSERT
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void dump_bad_graph(Node* n, Node* early, Node* LCA);
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#endif
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#ifndef PRODUCT
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void dump( ) const;
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void dump( IdealLoopTree *loop, uint rpo_idx, Node_List &rpo_list ) const;
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@ -819,6 +819,8 @@ void PhaseIdealLoop::split_if_with_blocks_post( Node *n ) {
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if( iff->is_If() ) { // Classic split-if?
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if( iff->in(0) != n_ctrl ) return; // Compare must be in same blk as if
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} else if (iff->is_CMove()) { // Trying to split-up a CMOVE
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// Can't split CMove with different control edge.
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if (iff->in(0) != NULL && iff->in(0) != n_ctrl ) return;
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if( get_ctrl(iff->in(2)) == n_ctrl ||
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get_ctrl(iff->in(3)) == n_ctrl )
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return; // Inputs not yet split-up
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@ -937,7 +939,7 @@ void PhaseIdealLoop::split_if_with_blocks_post( Node *n ) {
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}
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bool did_break = (i < imax); // Did we break out of the previous loop?
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if (!did_break && n->outcnt() > 1) { // All uses in outer loops!
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Node *late_load_ctrl;
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Node *late_load_ctrl = NULL;
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if (n->is_Load()) {
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// If n is a load, get and save the result from get_late_ctrl(),
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// to be later used in calculating the control for n's clones.
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