8136820: Generate better code for some Unsafe addressing patterns
Reshape address computation to move invariant part out of loops Reviewed-by: kvn
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@ -3767,6 +3767,22 @@ operand indIndexScale(any_RegP reg, rRegL lreg, immI2 scale)
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%}
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%}
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operand indPosIndexScale(any_RegP reg, rRegI idx, immI2 scale)
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%{
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constraint(ALLOC_IN_RC(ptr_reg));
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predicate(n->in(3)->in(1)->as_Type()->type()->is_long()->_lo >= 0);
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match(AddP reg (LShiftL (ConvI2L idx) scale));
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op_cost(10);
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format %{"[$reg + pos $idx << $scale]" %}
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interface(MEMORY_INTER) %{
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base($reg);
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index($idx);
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scale($scale);
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disp(0x0);
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%}
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%}
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// Indirect Memory Times Scale Plus Index Register Plus Offset Operand
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operand indIndexScaleOffset(any_RegP reg, immL32 off, rRegL lreg, immI2 scale)
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%{
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@ -4159,7 +4175,7 @@ operand cmpOpUCF2() %{
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// case of this is memory operands.
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opclass memory(indirect, indOffset8, indOffset32, indIndexOffset, indIndex,
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indIndexScale, indIndexScaleOffset, indPosIndexOffset, indPosIndexScaleOffset,
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indIndexScale, indPosIndexScale, indIndexScaleOffset, indPosIndexOffset, indPosIndexScaleOffset,
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indCompressedOopOffset,
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indirectNarrow, indOffset8Narrow, indOffset32Narrow,
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indIndexOffsetNarrow, indIndexNarrow, indIndexScaleNarrow,
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@ -5186,6 +5202,17 @@ instruct leaPIdxScale(rRegP dst, indIndexScale mem)
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ins_pipe(ialu_reg_reg_fat);
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%}
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instruct leaPPosIdxScale(rRegP dst, indPosIndexScale mem)
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%{
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match(Set dst mem);
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ins_cost(110);
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format %{ "leaq $dst, $mem\t# ptr idxscale" %}
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opcode(0x8D);
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ins_encode(REX_reg_mem_wide(dst, mem), OpcP, reg_mem(dst, mem));
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ins_pipe(ialu_reg_reg_fat);
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%}
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instruct leaPIdxScaleOff(rRegP dst, indIndexScaleOffset mem)
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%{
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match(Set dst mem);
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@ -447,21 +447,21 @@ Node *PhaseIdealLoop::remix_address_expressions( Node *n ) {
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}
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// Replace (I1 +p (I2 + V)) with ((I1 +p I2) +p V)
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if( n2_loop != n_loop && n3_loop == n_loop ) {
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if( n->in(3)->Opcode() == Op_AddI ) {
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if (n2_loop != n_loop && n3_loop == n_loop) {
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if (n->in(3)->Opcode() == Op_AddX) {
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Node *V = n->in(3)->in(1);
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Node *I = n->in(3)->in(2);
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if( is_member(n_loop,get_ctrl(V)) ) {
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if (is_member(n_loop,get_ctrl(V))) {
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} else {
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Node *tmp = V; V = I; I = tmp;
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}
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if( !is_member(n_loop,get_ctrl(I)) ) {
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Node *add1 = new AddPNode( n->in(1), n->in(2), I );
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if (!is_member(n_loop,get_ctrl(I))) {
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Node *add1 = new AddPNode(n->in(1), n->in(2), I);
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// Stuff new AddP in the loop preheader
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register_new_node( add1, n_loop->_head->in(LoopNode::EntryControl) );
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Node *add2 = new AddPNode( n->in(1), add1, V );
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register_new_node( add2, n_ctrl );
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_igvn.replace_node( n, add2 );
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register_new_node(add1, n_loop->_head->in(LoopNode::EntryControl));
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Node *add2 = new AddPNode(n->in(1), add1, V);
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register_new_node(add2, n_ctrl);
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_igvn.replace_node(n, add2);
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return add2;
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}
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}
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@ -2045,6 +2045,33 @@ bool Matcher::is_bmi_pattern(Node *n, Node *m) {
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// and then expanded into the inline_cache_reg and a method_oop register
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// defined in ad_<arch>.cpp
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// Check for shift by small constant as well
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static bool clone_shift(Node* shift, Matcher* matcher, MStack& mstack, VectorSet& address_visited) {
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if (shift->Opcode() == Op_LShiftX && shift->in(2)->is_Con() &&
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shift->in(2)->get_int() <= 3 &&
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// Are there other uses besides address expressions?
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!matcher->is_visited(shift)) {
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address_visited.set(shift->_idx); // Flag as address_visited
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mstack.push(shift->in(2), Visit);
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Node *conv = shift->in(1);
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#ifdef _LP64
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// Allow Matcher to match the rule which bypass
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// ConvI2L operation for an array index on LP64
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// if the index value is positive.
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if (conv->Opcode() == Op_ConvI2L &&
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conv->as_Type()->type()->is_long()->_lo >= 0 &&
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// Are there other uses besides address expressions?
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!matcher->is_visited(conv)) {
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address_visited.set(conv->_idx); // Flag as address_visited
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mstack.push(conv->in(1), Pre_Visit);
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} else
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#endif
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mstack.push(conv, Pre_Visit);
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return true;
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}
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return false;
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}
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//------------------------------find_shared------------------------------------
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// Set bits if Node is shared or otherwise a root
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@ -2205,7 +2232,10 @@ void Matcher::find_shared( Node *n ) {
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#endif
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// Clone addressing expressions as they are "free" in memory access instructions
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if( mem_op && i == MemNode::Address && mop == Op_AddP ) {
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if (mem_op && i == MemNode::Address && mop == Op_AddP &&
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// When there are other uses besides address expressions
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// put it on stack and mark as shared.
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!is_visited(m)) {
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// Some inputs for address expression are not put on stack
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// to avoid marking them as shared and forcing them into register
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// if they are used only in address expressions.
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@ -2213,10 +2243,7 @@ void Matcher::find_shared( Node *n ) {
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// besides address expressions.
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Node *off = m->in(AddPNode::Offset);
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if( off->is_Con() &&
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// When there are other uses besides address expressions
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// put it on stack and mark as shared.
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!is_visited(m) ) {
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if (off->is_Con()) {
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address_visited.test_set(m->_idx); // Flag as address_visited
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Node *adr = m->in(AddPNode::Address);
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@ -2229,28 +2256,7 @@ void Matcher::find_shared( Node *n ) {
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!is_visited(adr) ) {
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address_visited.set(adr->_idx); // Flag as address_visited
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Node *shift = adr->in(AddPNode::Offset);
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// Check for shift by small constant as well
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if( shift->Opcode() == Op_LShiftX && shift->in(2)->is_Con() &&
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shift->in(2)->get_int() <= 3 &&
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// Are there other uses besides address expressions?
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!is_visited(shift) ) {
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address_visited.set(shift->_idx); // Flag as address_visited
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mstack.push(shift->in(2), Visit);
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Node *conv = shift->in(1);
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#ifdef _LP64
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// Allow Matcher to match the rule which bypass
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// ConvI2L operation for an array index on LP64
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// if the index value is positive.
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if( conv->Opcode() == Op_ConvI2L &&
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conv->as_Type()->type()->is_long()->_lo >= 0 &&
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// Are there other uses besides address expressions?
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!is_visited(conv) ) {
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address_visited.set(conv->_idx); // Flag as address_visited
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mstack.push(conv->in(1), Pre_Visit);
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} else
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#endif
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mstack.push(conv, Pre_Visit);
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} else {
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if (!clone_shift(shift, this, mstack, address_visited)) {
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mstack.push(shift, Pre_Visit);
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}
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mstack.push(adr->in(AddPNode::Address), Pre_Visit);
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@ -2263,6 +2269,12 @@ void Matcher::find_shared( Node *n ) {
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mstack.push(off, Visit);
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mstack.push(m->in(AddPNode::Base), Pre_Visit);
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continue; // for(int i = ...)
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} else if (clone_shift_expressions &&
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clone_shift(off, this, mstack, address_visited)) {
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address_visited.test_set(m->_idx); // Flag as address_visited
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mstack.push(m->in(AddPNode::Address), Pre_Visit);
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mstack.push(m->in(AddPNode::Base), Pre_Visit);
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continue;
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} // if( off->is_Con() )
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} // if( mem_op &&
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mstack.push(m, Pre_Visit);
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@ -3055,6 +3055,9 @@ bool SWPointer::offset_plus_k(Node* n, bool negate) {
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}
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}
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if (invariant(n)) {
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if (opc == Op_ConvI2L) {
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n = n->in(1);
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}
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_negate_invar = negate;
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_invar = n;
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NOT_PRODUCT(_tracer.offset_plus_k_10(n, _invar, _negate_invar, _offset);)
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