8231467: Missing make prerequisite declaration corrupts make dependency files on Windows

Reviewed-by: ihse, tbell
This commit is contained in:
Erik Joelsson 2019-09-26 07:20:51 -07:00
parent 6e1aa9065c
commit f8bb7b3a26

View File

@ -760,34 +760,6 @@ define SetupNativeCompilationBody
endif
endif
# Create a rule to collect all the individual make dependency files into a
# single makefile.
$1_DEPS_FILE := $$($1_OBJECT_DIR)/$1.d
$$($1_DEPS_FILE): $$($1_ALL_OBJS)
$(RM) $$@
# CD into dir to reduce risk of hitting command length limits, which
# could otherwise happen if TOPDIR is a very long path.
$(CD) $$($1_OBJECT_DIR) && $(CAT) *.d > $$@.tmp
$(CD) $$($1_OBJECT_DIR) && $(CAT) *.d.targets | $(SORT) -u >> $$@.tmp
# After generating the file, which happens after all objects have been
# compiled, copy it to .old extension. On the next make invocation, this
# .old file will be included by make.
$(CP) $$@.tmp $$@.old
$(MV) $$@.tmp $$@
$1 += $$($1_DEPS_FILE)
# The include must be on the .old file, which represents the state from the
# previous invocation of make. The file being included must not have a rule
# defined for it as otherwise make will think it has to run the rule before
# being able to include the file, which would be wrong since we specifically
# need the file as it was generated by a previous make invocation.
ifneq ($$(wildcard $$($1_DEPS_FILE).old), )
$1_DEPS_FILE_LOADED := true
-include $$($1_DEPS_FILE).old
endif
# Now call SetupCompileNativeFile for each source file we are going to compile.
$$(foreach file, $$($1_SRCS), \
$$(eval $$(call SetupCompileNativeFile, $1_$$(notdir $$(file)),\
@ -850,6 +822,34 @@ define SetupNativeCompilationBody
endif
endif
# Create a rule to collect all the individual make dependency files into a
# single makefile.
$1_DEPS_FILE := $$($1_OBJECT_DIR)/$1.d
$$($1_DEPS_FILE): $$($1_ALL_OBJS) $$($1_RES)
$(RM) $$@
# CD into dir to reduce risk of hitting command length limits, which
# could otherwise happen if TOPDIR is a very long path.
$(CD) $$($1_OBJECT_DIR) && $(CAT) *.d > $$@.tmp
$(CD) $$($1_OBJECT_DIR) && $(CAT) *.d.targets | $(SORT) -u >> $$@.tmp
# After generating the file, which happens after all objects have been
# compiled, copy it to .old extension. On the next make invocation, this
# .old file will be included by make.
$(CP) $$@.tmp $$@.old
$(MV) $$@.tmp $$@
$1 += $$($1_DEPS_FILE)
# The include must be on the .old file, which represents the state from the
# previous invocation of make. The file being included must not have a rule
# defined for it as otherwise make will think it has to run the rule before
# being able to include the file, which would be wrong since we specifically
# need the file as it was generated by a previous make invocation.
ifneq ($$(wildcard $$($1_DEPS_FILE).old), )
$1_DEPS_FILE_LOADED := true
-include $$($1_DEPS_FILE).old
endif
ifneq ($(DISABLE_MAPFILES), true)
$1_REAL_MAPFILE := $$($1_MAPFILE)
ifeq ($(call isTargetOs, windows), false)