8231467: Missing make prerequisite declaration corrupts make dependency files on Windows
Reviewed-by: ihse, tbell
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@ -760,34 +760,6 @@ define SetupNativeCompilationBody
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endif
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endif
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# Create a rule to collect all the individual make dependency files into a
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# single makefile.
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$1_DEPS_FILE := $$($1_OBJECT_DIR)/$1.d
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$$($1_DEPS_FILE): $$($1_ALL_OBJS)
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$(RM) $$@
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# CD into dir to reduce risk of hitting command length limits, which
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# could otherwise happen if TOPDIR is a very long path.
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$(CD) $$($1_OBJECT_DIR) && $(CAT) *.d > $$@.tmp
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$(CD) $$($1_OBJECT_DIR) && $(CAT) *.d.targets | $(SORT) -u >> $$@.tmp
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# After generating the file, which happens after all objects have been
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# compiled, copy it to .old extension. On the next make invocation, this
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# .old file will be included by make.
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$(CP) $$@.tmp $$@.old
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$(MV) $$@.tmp $$@
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$1 += $$($1_DEPS_FILE)
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# The include must be on the .old file, which represents the state from the
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# previous invocation of make. The file being included must not have a rule
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# defined for it as otherwise make will think it has to run the rule before
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# being able to include the file, which would be wrong since we specifically
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# need the file as it was generated by a previous make invocation.
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ifneq ($$(wildcard $$($1_DEPS_FILE).old), )
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$1_DEPS_FILE_LOADED := true
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-include $$($1_DEPS_FILE).old
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endif
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# Now call SetupCompileNativeFile for each source file we are going to compile.
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$$(foreach file, $$($1_SRCS), \
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$$(eval $$(call SetupCompileNativeFile, $1_$$(notdir $$(file)),\
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@ -850,6 +822,34 @@ define SetupNativeCompilationBody
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endif
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endif
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# Create a rule to collect all the individual make dependency files into a
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# single makefile.
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$1_DEPS_FILE := $$($1_OBJECT_DIR)/$1.d
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$$($1_DEPS_FILE): $$($1_ALL_OBJS) $$($1_RES)
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$(RM) $$@
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# CD into dir to reduce risk of hitting command length limits, which
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# could otherwise happen if TOPDIR is a very long path.
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$(CD) $$($1_OBJECT_DIR) && $(CAT) *.d > $$@.tmp
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$(CD) $$($1_OBJECT_DIR) && $(CAT) *.d.targets | $(SORT) -u >> $$@.tmp
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# After generating the file, which happens after all objects have been
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# compiled, copy it to .old extension. On the next make invocation, this
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# .old file will be included by make.
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$(CP) $$@.tmp $$@.old
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$(MV) $$@.tmp $$@
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$1 += $$($1_DEPS_FILE)
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# The include must be on the .old file, which represents the state from the
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# previous invocation of make. The file being included must not have a rule
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# defined for it as otherwise make will think it has to run the rule before
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# being able to include the file, which would be wrong since we specifically
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# need the file as it was generated by a previous make invocation.
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ifneq ($$(wildcard $$($1_DEPS_FILE).old), )
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$1_DEPS_FILE_LOADED := true
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-include $$($1_DEPS_FILE).old
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endif
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ifneq ($(DISABLE_MAPFILES), true)
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$1_REAL_MAPFILE := $$($1_MAPFILE)
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ifeq ($(call isTargetOs, windows), false)
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