8022475: Remove unneeded ad-files
Remove .ad files that are not used Reviewed-by: kvn
This commit is contained in:
parent
bfe8385fa9
commit
fc44cdf0ec
@ -41,13 +41,11 @@ SOURCE.AD = $(OUTDIR)/$(OS)_$(Platform_arch_model).ad
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ifeq ("${Platform_arch_model}", "${Platform_arch}")
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SOURCES.AD = \
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch_model).ad) \
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$(call altsrc-replace,$(HS_COMMON_SRC)/os_cpu/$(OS)_$(ARCH)/vm/$(OS)_$(Platform_arch_model).ad)
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch_model).ad)
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else
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SOURCES.AD = \
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch_model).ad) \
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch).ad) \
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$(call altsrc-replace,$(HS_COMMON_SRC)/os_cpu/$(OS)_$(ARCH)/vm/$(OS)_$(Platform_arch_model).ad)
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch).ad)
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endif
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EXEC = $(OUTDIR)/adlc
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@ -41,13 +41,11 @@ SOURCE.AD = $(OUTDIR)/$(OS)_$(Platform_arch_model).ad
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ifeq ("${Platform_arch_model}", "${Platform_arch}")
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SOURCES.AD = \
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch_model).ad) \
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$(call altsrc-replace,$(HS_COMMON_SRC)/os_cpu/$(OS)_$(ARCH)/vm/$(OS)_$(Platform_arch_model).ad)
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch_model).ad)
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else
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SOURCES.AD = \
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch_model).ad) \
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch).ad) \
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$(call altsrc-replace,$(HS_COMMON_SRC)/os_cpu/$(OS)_$(ARCH)/vm/$(OS)_$(Platform_arch_model).ad)
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch).ad)
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endif
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EXEC = $(OUTDIR)/adlc
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@ -42,13 +42,11 @@ SOURCE.AD = $(OUTDIR)/$(OS)_$(Platform_arch_model).ad
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ifeq ("${Platform_arch_model}", "${Platform_arch}")
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SOURCES.AD = \
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch_model).ad) \
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$(call altsrc-replace,$(HS_COMMON_SRC)/os_cpu/$(OS)_$(ARCH)/vm/$(OS)_$(Platform_arch_model).ad)
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch_model).ad)
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else
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SOURCES.AD = \
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch_model).ad) \
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch).ad) \
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$(call altsrc-replace,$(HS_COMMON_SRC)/os_cpu/$(OS)_$(ARCH)/vm/$(OS)_$(Platform_arch_model).ad)
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$(call altsrc-replace,$(HS_COMMON_SRC)/cpu/$(ARCH)/vm/$(Platform_arch).ad)
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endif
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EXEC = $(OUTDIR)/adlc
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@ -55,13 +55,11 @@ CXX_INCLUDE_DIRS=\
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!if "$(Platform_arch_model)" == "$(Platform_arch)"
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SOURCES_AD=\
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$(WorkSpace)/src/cpu/$(Platform_arch)/vm/$(Platform_arch_model).ad \
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$(WorkSpace)/src/os_cpu/windows_$(Platform_arch)/vm/windows_$(Platform_arch_model).ad
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$(WorkSpace)/src/cpu/$(Platform_arch)/vm/$(Platform_arch_model).ad
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!else
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SOURCES_AD=\
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$(WorkSpace)/src/cpu/$(Platform_arch)/vm/$(Platform_arch_model).ad \
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$(WorkSpace)/src/cpu/$(Platform_arch)/vm/$(Platform_arch).ad \
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$(WorkSpace)/src/os_cpu/windows_$(Platform_arch)/vm/windows_$(Platform_arch_model).ad
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$(WorkSpace)/src/cpu/$(Platform_arch)/vm/$(Platform_arch).ad
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!endif
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# NOTE! If you add any files here, you must also update GENERATED_NAMES_IN_DIR
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@ -1,26 +0,0 @@
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//
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// Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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//
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// This code is free software; you can redistribute it and/or modify it
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// under the terms of the GNU General Public License version 2 only, as
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// published by the Free Software Foundation.
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//
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// This code is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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||||
// version 2 for more details (a copy is included in the LICENSE file that
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// accompanied this code).
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//
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// You should have received a copy of the GNU General Public License version
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||||
// 2 along with this work; if not, write to the Free Software Foundation,
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// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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//
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// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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// or visit www.oracle.com if you need additional information or have any
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// questions.
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//
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//
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// X86 Bsd Architecture Description File
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@ -1,65 +0,0 @@
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//
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// Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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//
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// This code is free software; you can redistribute it and/or modify it
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// under the terms of the GNU General Public License version 2 only, as
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||||
// published by the Free Software Foundation.
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||||
//
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// This code is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
// version 2 for more details (a copy is included in the LICENSE file that
|
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// accompanied this code).
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//
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// You should have received a copy of the GNU General Public License version
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||||
// 2 along with this work; if not, write to the Free Software Foundation,
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// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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//
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// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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// or visit www.oracle.com if you need additional information or have any
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// questions.
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//
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//
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// AMD64 Bsd Architecture Description File
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//----------OS-DEPENDENT ENCODING BLOCK----------------------------------------
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// This block specifies the encoding classes used by the compiler to
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// output byte streams. Encoding classes generate functions which are
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// called by Machine Instruction Nodes in order to generate the bit
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// encoding of the instruction. Operands specify their base encoding
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// interface with the interface keyword. There are currently
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// supported four interfaces, REG_INTER, CONST_INTER, MEMORY_INTER, &
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// COND_INTER. REG_INTER causes an operand to generate a function
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// which returns its register number when queried. CONST_INTER causes
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// an operand to generate a function which returns the value of the
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// constant when queried. MEMORY_INTER causes an operand to generate
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// four functions which return the Base Register, the Index Register,
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// the Scale Value, and the Offset Value of the operand when queried.
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// COND_INTER causes an operand to generate six functions which return
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// the encoding code (ie - encoding bits for the instruction)
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// associated with each basic boolean condition for a conditional
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// instruction. Instructions specify two basic values for encoding.
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// They use the ins_encode keyword to specify their encoding class
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// (which must be one of the class names specified in the encoding
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// block), and they use the opcode keyword to specify, in order, their
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// primary, secondary, and tertiary opcode. Only the opcode sections
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// which a particular instruction needs for encoding need to be
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// specified.
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encode %{
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// Build emit functions for each basic byte or larger field in the intel
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// encoding scheme (opcode, rm, sib, immediate), and call them from C++
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// code in the enc_class source block. Emit functions will live in the
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// main source block for now. In future, we can generalize this by
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// adding a syntax that specifies the sizes of fields in an order,
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// so that the adlc can build the emit functions automagically
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%}
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// Platform dependent source
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source %{
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%}
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@ -1,26 +0,0 @@
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//
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// Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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//
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// This code is free software; you can redistribute it and/or modify it
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// under the terms of the GNU General Public License version 2 only, as
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// published by the Free Software Foundation.
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//
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// This code is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// version 2 for more details (a copy is included in the LICENSE file that
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// accompanied this code).
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//
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// You should have received a copy of the GNU General Public License version
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// 2 along with this work; if not, write to the Free Software Foundation,
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// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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//
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// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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// or visit www.oracle.com if you need additional information or have any
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// questions.
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//
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//
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// X86 Linux Architecture Description File
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@ -1,65 +0,0 @@
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//
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// Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
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//
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// This code is free software; you can redistribute it and/or modify it
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// under the terms of the GNU General Public License version 2 only, as
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// published by the Free Software Foundation.
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//
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// This code is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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||||
// version 2 for more details (a copy is included in the LICENSE file that
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// accompanied this code).
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//
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// You should have received a copy of the GNU General Public License version
|
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// 2 along with this work; if not, write to the Free Software Foundation,
|
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// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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//
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// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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// or visit www.oracle.com if you need additional information or have any
|
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// questions.
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//
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//
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// AMD64 Linux Architecture Description File
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//----------OS-DEPENDENT ENCODING BLOCK----------------------------------------
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// This block specifies the encoding classes used by the compiler to
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// output byte streams. Encoding classes generate functions which are
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// called by Machine Instruction Nodes in order to generate the bit
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// encoding of the instruction. Operands specify their base encoding
|
||||
// interface with the interface keyword. There are currently
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// supported four interfaces, REG_INTER, CONST_INTER, MEMORY_INTER, &
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// COND_INTER. REG_INTER causes an operand to generate a function
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// which returns its register number when queried. CONST_INTER causes
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// an operand to generate a function which returns the value of the
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// constant when queried. MEMORY_INTER causes an operand to generate
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// four functions which return the Base Register, the Index Register,
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// the Scale Value, and the Offset Value of the operand when queried.
|
||||
// COND_INTER causes an operand to generate six functions which return
|
||||
// the encoding code (ie - encoding bits for the instruction)
|
||||
// associated with each basic boolean condition for a conditional
|
||||
// instruction. Instructions specify two basic values for encoding.
|
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// They use the ins_encode keyword to specify their encoding class
|
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// (which must be one of the class names specified in the encoding
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// block), and they use the opcode keyword to specify, in order, their
|
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// primary, secondary, and tertiary opcode. Only the opcode sections
|
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// which a particular instruction needs for encoding need to be
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// specified.
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encode %{
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// Build emit functions for each basic byte or larger field in the intel
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// encoding scheme (opcode, rm, sib, immediate), and call them from C++
|
||||
// code in the enc_class source block. Emit functions will live in the
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// main source block for now. In future, we can generalize this by
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// adding a syntax that specifies the sizes of fields in an order,
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// so that the adlc can build the emit functions automagically
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%}
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// Platform dependent source
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source %{
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%}
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@ -1,27 +0,0 @@
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//
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// Copyright (c) 1999, 2007, Oracle and/or its affiliates. All rights reserved.
|
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
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//
|
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// This code is free software; you can redistribute it and/or modify it
|
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// under the terms of the GNU General Public License version 2 only, as
|
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// published by the Free Software Foundation.
|
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//
|
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// This code is distributed in the hope that it will be useful, but WITHOUT
|
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
// version 2 for more details (a copy is included in the LICENSE file that
|
||||
// accompanied this code).
|
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//
|
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// You should have received a copy of the GNU General Public License version
|
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// 2 along with this work; if not, write to the Free Software Foundation,
|
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// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
|
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//
|
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// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
|
||||
// or visit www.oracle.com if you need additional information or have any
|
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// questions.
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//
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//
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//
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// SPARC Solaris Architecture Description File
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@ -1,26 +0,0 @@
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//
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// Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
|
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
//
|
||||
// This code is free software; you can redistribute it and/or modify it
|
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// under the terms of the GNU General Public License version 2 only, as
|
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// published by the Free Software Foundation.
|
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//
|
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// This code is distributed in the hope that it will be useful, but WITHOUT
|
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
// version 2 for more details (a copy is included in the LICENSE file that
|
||||
// accompanied this code).
|
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//
|
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// You should have received a copy of the GNU General Public License version
|
||||
// 2 along with this work; if not, write to the Free Software Foundation,
|
||||
// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
|
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//
|
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// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
|
||||
// or visit www.oracle.com if you need additional information or have any
|
||||
// questions.
|
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//
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//
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// X86 Solaris Architecture Description File
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|
@ -1,63 +0,0 @@
|
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//
|
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// Copyright (c) 2004, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
//
|
||||
// This code is free software; you can redistribute it and/or modify it
|
||||
// under the terms of the GNU General Public License version 2 only, as
|
||||
// published by the Free Software Foundation.
|
||||
//
|
||||
// This code is distributed in the hope that it will be useful, but WITHOUT
|
||||
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
// version 2 for more details (a copy is included in the LICENSE file that
|
||||
// accompanied this code).
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License version
|
||||
// 2 along with this work; if not, write to the Free Software Foundation,
|
||||
// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
//
|
||||
// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
|
||||
// or visit www.oracle.com if you need additional information or have any
|
||||
// questions.
|
||||
//
|
||||
//
|
||||
|
||||
// AMD64 Solaris Architecture Description File
|
||||
|
||||
//----------OS-DEPENDENT ENCODING BLOCK----------------------------------------
|
||||
// This block specifies the encoding classes used by the compiler to
|
||||
// output byte streams. Encoding classes generate functions which are
|
||||
// called by Machine Instruction Nodes in order to generate the bit
|
||||
// encoding of the instruction. Operands specify their base encoding
|
||||
// interface with the interface keyword. There are currently
|
||||
// supported four interfaces, REG_INTER, CONST_INTER, MEMORY_INTER, &
|
||||
// COND_INTER. REG_INTER causes an operand to generate a function
|
||||
// which returns its register number when queried. CONST_INTER causes
|
||||
// an operand to generate a function which returns the value of the
|
||||
// constant when queried. MEMORY_INTER causes an operand to generate
|
||||
// four functions which return the Base Register, the Index Register,
|
||||
// the Scale Value, and the Offset Value of the operand when queried.
|
||||
// COND_INTER causes an operand to generate six functions which return
|
||||
// the encoding code (ie - encoding bits for the instruction)
|
||||
// associated with each basic boolean condition for a conditional
|
||||
// instruction. Instructions specify two basic values for encoding.
|
||||
// They use the ins_encode keyword to specify their encoding class
|
||||
// (which must be one of the class names specified in the encoding
|
||||
// block), and they use the opcode keyword to specify, in order, their
|
||||
// primary, secondary, and tertiary opcode. Only the opcode sections
|
||||
// which a particular instruction needs for encoding need to be
|
||||
// specified.
|
||||
encode %{
|
||||
// Build emit functions for each basic byte or larger field in the intel
|
||||
// encoding scheme (opcode, rm, sib, immediate), and call them from C++
|
||||
// code in the enc_class source block. Emit functions will live in the
|
||||
// main source block for now. In future, we can generalize this by
|
||||
// adding a syntax that specifies the sizes of fields in an order,
|
||||
// so that the adlc can build the emit functions automagically
|
||||
%}
|
||||
|
||||
|
||||
// Platform dependent source
|
||||
|
||||
source %{
|
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%}
|
@ -1,26 +0,0 @@
|
||||
//
|
||||
// Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
//
|
||||
// This code is free software; you can redistribute it and/or modify it
|
||||
// under the terms of the GNU General Public License version 2 only, as
|
||||
// published by the Free Software Foundation.
|
||||
//
|
||||
// This code is distributed in the hope that it will be useful, but WITHOUT
|
||||
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
// version 2 for more details (a copy is included in the LICENSE file that
|
||||
// accompanied this code).
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License version
|
||||
// 2 along with this work; if not, write to the Free Software Foundation,
|
||||
// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
//
|
||||
// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
|
||||
// or visit www.oracle.com if you need additional information or have any
|
||||
// questions.
|
||||
//
|
||||
//
|
||||
|
||||
// X86 Win32 Architecture Description File
|
||||
|
@ -1,63 +0,0 @@
|
||||
//
|
||||
// Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
|
||||
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||
//
|
||||
// This code is free software; you can redistribute it and/or modify it
|
||||
// under the terms of the GNU General Public License version 2 only, as
|
||||
// published by the Free Software Foundation.
|
||||
//
|
||||
// This code is distributed in the hope that it will be useful, but WITHOUT
|
||||
// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
// version 2 for more details (a copy is included in the LICENSE file that
|
||||
// accompanied this code).
|
||||
//
|
||||
// You should have received a copy of the GNU General Public License version
|
||||
// 2 along with this work; if not, write to the Free Software Foundation,
|
||||
// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
//
|
||||
// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
|
||||
// or visit www.oracle.com if you need additional information or have any
|
||||
// questions.
|
||||
//
|
||||
//
|
||||
|
||||
// AMD64 Win32 Architecture Description File
|
||||
|
||||
//----------OS-DEPENDENT ENCODING BLOCK-----------------------------------------------------
|
||||
// This block specifies the encoding classes used by the compiler to output
|
||||
// byte streams. Encoding classes generate functions which are called by
|
||||
// Machine Instruction Nodes in order to generate the bit encoding of the
|
||||
// instruction. Operands specify their base encoding interface with the
|
||||
// interface keyword. There are currently supported four interfaces,
|
||||
// REG_INTER, CONST_INTER, MEMORY_INTER, & COND_INTER. REG_INTER causes an
|
||||
// operand to generate a function which returns its register number when
|
||||
// queried. CONST_INTER causes an operand to generate a function which
|
||||
// returns the value of the constant when queried. MEMORY_INTER causes an
|
||||
// operand to generate four functions which return the Base Register, the
|
||||
// Index Register, the Scale Value, and the Offset Value of the operand when
|
||||
// queried. COND_INTER causes an operand to generate six functions which
|
||||
// return the encoding code (ie - encoding bits for the instruction)
|
||||
// associated with each basic boolean condition for a conditional instruction.
|
||||
// Instructions specify two basic values for encoding. They use the
|
||||
// ins_encode keyword to specify their encoding class (which must be one of
|
||||
// the class names specified in the encoding block), and they use the
|
||||
// opcode keyword to specify, in order, their primary, secondary, and
|
||||
// tertiary opcode. Only the opcode sections which a particular instruction
|
||||
// needs for encoding need to be specified.
|
||||
encode %{
|
||||
// Build emit functions for each basic byte or larger field in the intel
|
||||
// encoding scheme (opcode, rm, sib, immediate), and call them from C++
|
||||
// code in the enc_class source block. Emit functions will live in the
|
||||
// main source block for now. In future, we can generalize this by
|
||||
// adding a syntax that specifies the sizes of fields in an order,
|
||||
// so that the adlc can build the emit functions automagically
|
||||
|
||||
%}
|
||||
|
||||
|
||||
// Platform dependent source
|
||||
|
||||
source %{
|
||||
|
||||
%}
|
Loading…
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Reference in New Issue
Block a user