8283692: Add PrintIdealPhase that includes block scheduling
Reviewed-by: kvn, chagedorn
This commit is contained in:
parent
ab17f88f6c
commit
fe670ff403
src/hotspot/share/opto
@ -548,7 +548,13 @@ void Compile::print_ideal_ir(const char* phase_name) {
|
||||
is_osr_compilation() ? " compile_kind='osr'" : "",
|
||||
phase_name);
|
||||
}
|
||||
root()->dump(9999);
|
||||
if (_output == nullptr) {
|
||||
root()->dump(9999);
|
||||
} else {
|
||||
// Dump the node blockwise if we have a scheduling
|
||||
_output->print_scheduling();
|
||||
}
|
||||
|
||||
if (xtty != NULL) {
|
||||
xtty->tail("ideal");
|
||||
}
|
||||
@ -624,7 +630,8 @@ Compile::Compile( ciEnv* ci_env, ciMethod* target, int osr_bci,
|
||||
_replay_inline_data(NULL),
|
||||
_java_calls(0),
|
||||
_inner_loops(0),
|
||||
_interpreter_frame_size(0)
|
||||
_interpreter_frame_size(0),
|
||||
_output(NULL)
|
||||
#ifndef PRODUCT
|
||||
, _in_dump_cnt(0)
|
||||
#endif
|
||||
@ -898,6 +905,7 @@ Compile::Compile( ciEnv* ci_env,
|
||||
_java_calls(0),
|
||||
_inner_loops(0),
|
||||
_interpreter_frame_size(0),
|
||||
_output(NULL),
|
||||
#ifndef PRODUCT
|
||||
_in_dump_cnt(0),
|
||||
#endif
|
||||
|
@ -324,6 +324,8 @@ void PhaseOutput::perform_mach_node_analysis() {
|
||||
bs->late_barrier_analysis();
|
||||
|
||||
pd_perform_mach_node_analysis();
|
||||
|
||||
C->print_method(CompilerPhaseType::PHASE_MACHANALYSIS, 4);
|
||||
}
|
||||
|
||||
// Convert Nodes to instruction bits and pass off to the VM
|
||||
@ -2117,20 +2119,27 @@ void PhaseOutput::ScheduleAndBundle() {
|
||||
#ifndef PRODUCT
|
||||
if (C->trace_opto_output()) {
|
||||
tty->print("\n---- After ScheduleAndBundle ----\n");
|
||||
for (uint i = 0; i < C->cfg()->number_of_blocks(); i++) {
|
||||
tty->print("\nBB#%03d:\n", i);
|
||||
Block* block = C->cfg()->get_block(i);
|
||||
for (uint j = 0; j < block->number_of_nodes(); j++) {
|
||||
Node* n = block->get_node(j);
|
||||
OptoReg::Name reg = C->regalloc()->get_reg_first(n);
|
||||
tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
|
||||
n->dump();
|
||||
}
|
||||
}
|
||||
print_scheduling();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifndef PRODUCT
|
||||
// Separated out so that it can be called directly from debugger
|
||||
void PhaseOutput::print_scheduling() {
|
||||
for (uint i = 0; i < C->cfg()->number_of_blocks(); i++) {
|
||||
tty->print("\nBB#%03d:\n", i);
|
||||
Block* block = C->cfg()->get_block(i);
|
||||
for (uint j = 0; j < block->number_of_nodes(); j++) {
|
||||
Node* n = block->get_node(j);
|
||||
OptoReg::Name reg = C->regalloc()->get_reg_first(n);
|
||||
tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
|
||||
n->dump();
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
// See if this node fits into the present instruction bundle
|
||||
bool Scheduling::NodeFitsInBundle(Node *n) {
|
||||
uint n_idx = n->_idx;
|
||||
|
@ -263,6 +263,7 @@ public:
|
||||
void BuildOopMaps();
|
||||
|
||||
#ifndef PRODUCT
|
||||
void print_scheduling();
|
||||
static void print_statistics();
|
||||
#endif
|
||||
};
|
||||
|
@ -57,6 +57,7 @@
|
||||
flags(AFTER_BEAUTIFY_LOOPS, "After beautify loops") \
|
||||
flags(BEFORE_MATCHING, "Before matching") \
|
||||
flags(MATCHING, "After matching") \
|
||||
flags(MACHANALYSIS, "After mach analysis") \
|
||||
flags(INCREMENTAL_INLINE, "Incremental Inline") \
|
||||
flags(INCREMENTAL_INLINE_STEP, "Incremental Inline Step") \
|
||||
flags(INCREMENTAL_INLINE_CLEANUP, "Incremental Inline Cleanup") \
|
||||
|
Loading…
x
Reference in New Issue
Block a user