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37 Commits

Author SHA1 Message Date
Shrinivas Joshi
c0f886ec65 8035936: SIGBUS in StubRoutines::aesencryptBlock, solaris-sparc 
Fix the arbitrary alignment issue in SPARC AES crypto stub routines.

Reviewed-by: kvn, iveresov
 2014-04-30 14:14:01 -07:00
Shrinivas Joshi
d4c9d3889b 8002074: Support for AES on SPARC 
Add intrinsics/stub routines support for single-block and multi-block (as used by Cipher Block Chaining mode) AES encryption and decryption operations on the SPARC platform.

Reviewed-by: kvn, roland
 2014-01-14 17:46:48 -08:00
Mikael Vidstedt
a0da47fd66 8029233: Update copyright year to match last edit in jdk8 hotspot repository for 2013 
Copyright year updated for files modified during 2013

Reviewed-by: twisti, iveresov
 2013-12-24 11:48:39 -08:00
Volker Simonis
f0010291f7 8029190: VM_Version::determine_features() asserts on Fujitsu Sparc64 CPUs 
Fix code to allow testing on Fujitsu Sparc64 CPUs

Reviewed-by: kvn
 2013-12-02 11:12:32 +01:00
Morris Meyer
5b2339a7a2 8008407: remove SPARC V8 support 
Removed most of the SPARC V8 instructions

Reviewed-by: kvn, twisti
 2013-06-07 16:46:37 -07:00
Aleksey Shipilev
0614ed6542 8003985: Support @Contended Annotation - JEP 142 
HotSpot changes to support @Contended annotation.

Reviewed-by: coleenp, kvn, jrose
 2013-01-14 15:17:47 +01:00
Christian Thalinger
34733bb83c 8003250: SPARC: move MacroAssembler into separate file 
Reviewed-by: jrose, kvn
 2012-12-06 09:57:41 -08:00
Roland Westrelin
61eb5a0549 7054512: Compress class pointers after perm gen removal 
Support of compress class pointers in the compilers.

Reviewed-by: kvn, twisti
 2012-10-09 10:11:38 +02:00
Tao Mao
c791cfaf95 7188176: The JVM should differentiate between T and M series and adjust GC ergonomics 
Reviewed-by: kvn
 2012-09-24 11:07:03 -07:00
Roland Westrelin
302540691b 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() 
Use shorter instruction sequences for atomic add and atomic exchange when possible.

Reviewed-by: kvn, jrose
 2012-09-20 16:49:17 +02:00
John Cuthbertson
384650cb3e 7192128: G1: Extend fix for 6948537 to G1's BOT 
G1 does not appear to be immune to the issue described in CR 6948537 and increasing the size of old-generation PLABs appears to increase the liklihood of seeing the issue. Extend the fix for 6948537 to G1's BlockOffsetTable.

Reviewed-by: brutisso, jmasa
 2012-08-21 10:05:57 -07:00
Vladimir Kozlov
d1191bb4f4 7119644: Increase superword's vector size up to 256 bits 
Increase vector size up to 256-bits for YMM AVX registers on x86.

Reviewed-by: never, twisti, roland
 2012-06-15 01:25:19 -07:00
Christian Thalinger
5ffce97ffc 7104561: UseRDPCForConstantTableBase doesn't work after shorten branches changes 
Reviewed-by: never, kvn
 2011-10-31 03:06:42 -07:00
Vladimir Kozlov
f7d7a6071a 7039731: arraycopy could use prefetch on SPARC 
Use BIS and prefetch in arraycopy stubs for Sparc (BIS for T4 only).

Reviewed-by: never, iveresov
 2011-09-02 12:13:33 -07:00
Vladimir Kozlov
6446205688 7059037: Use BIS for zeroing on T4 
Use BIS for zeroing new allocated big (2Kb and more) objects and arrays.

Reviewed-by: never, twisti, ysr
 2011-08-26 08:52:22 -07:00
Vladimir Kozlov
90651b2666 7079329: Adjust allocation prefetching for T4 
On T4 2 BIS instructions should be issued to prefetch 64 bytes

Reviewed-by: iveresov, phh, twisti
 2011-08-16 16:59:46 -07:00
Vladimir Kozlov
ac99f413d7 7063629: use cbcond in C2 generated code on T4 
Use new short branch instruction in C2 generated code.

Reviewed-by: never
 2011-08-11 12:08:11 -07:00
Vladimir Kozlov
48c1293916 7063628: Use cbcond on T4 
Add new short branch instruction to Hotspot sparc assembler.

Reviewed-by: never, twisti, jrose
 2011-07-21 11:25:07 -07:00
Vladimir Kozlov
20a26c54cd 7059034: Use movxtod/movdtox on T4 
Use new VIS3 mov instructions on T4 for move data between general and float registers.

Reviewed-by: never, twisti
 2011-07-08 09:38:48 -07:00
Vladimir Kozlov
9fd396ce55 7006505: Use kstat info to identify SPARC processor 
Read Solaris kstat data to get more precise CPU information

Reviewed-by: iveresov, never, twisti, dholmes
 2010-12-16 14:15:12 -08:00
Stefan Karlsson
8006fe8f75 6989984: Use standard include model for Hospot 
Replaced MakeDeps and the includeDB files with more standardized solutions.

Reviewed-by: coleenp, kvn, kamg
 2010-11-23 13:22:55 -08:00
Vladimir Kozlov
249b1f6c4f 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14 
Use hardware DIV instruction for long division by constant when it is faster than code with multiply.

Reviewed-by: never
 2010-11-02 09:00:37 -07:00
Tom Rodriguez
a54b1ff70e 6978249: spill between cpu and fpu registers when those moves are fast 
Reviewed-by: kvn
 2010-08-19 14:51:47 -07:00
John R Rose
d6a9b93b5a Merge 2010-06-02 22:45:42 -07:00
Vladimir Kozlov
a3005a16fc 6954029: Improve implicit null check generation with compressed oops 
Hoist DecodeN instruction above null check

Reviewed-by: never, twisti
 2010-06-02 09:49:32 -07:00
Erik Trimble
ba7c173659 6941466: Oracle rebranding changes for Hotspot repositories 
Change all the Sun copyrights to Oracle copyright

Reviewed-by: ohair
 2010-05-27 19:08:38 -07:00
Y. Srinivas Ramakrishna
762f60d343 6948537: CMS: BOT walkers observe out-of-thin-air zeros on sun4v sparc/CMT 
On sun4v/CMT avoid use of memset() in BOT updates so as to prevent concurrent BOT readers from seeing the phantom zeros arising from memset()'s use of BIS.

Reviewed-by: jmasa, johnc, minqi, poonam, tonyp
 2010-05-03 10:24:51 -07:00
Vladimir Kozlov
f6934fd3b7 6940726: Use BIS instruction for allocation prefetch on Sparc 
Use BIS instruction for allocation prefetch on Sparc

Reviewed-by: twisti
 2010-04-07 12:39:27 -07:00
Vladimir Kozlov
5f8098a402 6940701: Don't align loops in stubs for Niagara sparc 
Don't align loops in stubs for Niagara sparc since NOPs are expensive.

Reviewed-by: twisti, never
 2010-04-07 09:37:47 -07:00
Vladimir Kozlov
705188bb7b 6821700: tune VM flags for peak performance 
Tune C2 flags default values for performance.

Reviewed-by: never, phh, iveresov, jmasa, ysr
 2009-03-30 18:19:31 -07:00
Christian Thalinger
de67e52949 6378821: bitCount() should use POPC on SPARC processors and AMD+10h 
BitCount() should use POPC on SPARC processors where POPC is implemented directly in hardware.

Reviewed-by: kvn, never
 2009-03-13 11:35:17 -07:00
Vladimir Kozlov
69f9ddee90 6791178: Specialize for zero as the compressed oop vm heap base 
Use zero based compressed oops if java heap is below 32gb and unscaled compressed oops if java heap is below 4gb.

Reviewed-by: never, twisti, jcoomes, coleenp
 2009-03-12 10:37:46 -07:00
Christian Thalinger
66cecec230 6812587: Use auxv to determine SPARC hardware features on Solaris 
A similar function to getisax(2) should be used to determine all possible instruction set extensions.

Reviewed-by: never, kvn
 2009-03-11 14:16:13 -07:00
Xiomara Jayasena
c96a95c4b8 6719955: Update copyright year 
Update copyright year for files that have been modified in 2008

Reviewed-by: ohair, tbell
 2008-07-02 12:55:16 -07:00
Coleen Phillimore
4a831d45f0 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes 
Compressed oops in instances, arrays, and headers. Code contributors are coleenp, phh, never, swamyv

Reviewed-by: jmasa, kamg, acorn, tbell, kvn, rasbold
 2008-04-13 17:43:42 -04:00
Jon Masamitsu
63f1de52fc 6362677: Change parallel GC collector default number of parallel GC threads 
Use the same default number of GC threads as used by ParNewGC and ConcMarkSweepGC (i.e., the 5/8th rule).

Reviewed-by: ysr, tonyp
 2008-02-22 17:17:14 -08:00
J. Duke
8153779ad3 Initial load 2007-12-01 00:00:00 +00:00