33 Commits

Author SHA1 Message Date
Goetz Lindenmaier
ad601cca0c 8131676: Fix warning 'negative int converted to unsigned' after 8085932
Also fix 64-bit constant added in 8076276.

Reviewed-by: kvn
2015-07-16 14:18:13 +02:00
Michael Berg
2ef39760e6 8081247: AVX 512 extended support
Add more support for EVEX encoding

Reviewed-by: kvn, neliasso
2015-06-23 12:45:08 -07:00
Michael C Berg
4fca8dbb1f 8076276: Add support for AVX512
Reviewed-by: kvn, roland
2015-05-08 11:49:20 -07:00
Vladimir Kempik
4e46878062 8058935: CPU detection gives 0 cores per cpu, 2 threads per core in Amazon EC2 environment
Reviewed-by: kvn, dsamersoff
2014-12-01 18:22:45 +04:00
Vladimir Kozlov
b9e949183d 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method
Add new C2 intrinsic for BigInteger::multiplyToLen() on x86 in 64-bit VM.

Reviewed-by: roland
2014-09-02 12:48:45 -07:00
Vladimir Kozlov
f813683519 8055069: TSX and RTM should be deprecated more strongly until hardware is corrected
Require to specify UnlockExperimentalVMOptions flag together with UseRTMLocking flag on un-patched systems where CPUID allows it but is unsupported otherwise.

Reviewed-by: iveresov, fzhinkin
2014-08-22 12:03:49 -07:00
Daniel D. Daugherty
a06d36cada 8049717: expose L1_data_cache_line_size for diagnostic/sanity checks
Add support for VM_Version::L1_data_cache_line_size().

Reviewed-by: dsimms, kvn, dholmes
2014-07-15 07:33:49 -07:00
Vladimir Kozlov
77d38feb95 8038633: crash in VM_Version::get_processor_features() on startup
Windows need an exception wrapper around getPsrInfo_stub() call in order to properly handle SEGV for YMM registers test.

Reviewed-by: iveresov, iignatyev
2014-03-31 13:08:03 -07:00
Vladimir Kozlov
97a51c5c2a 8031320: Use Intel RTM instructions for locks
Use RTM for inflated locks and stack locks.

Reviewed-by: iveresov, twisti, roland, dcubed
2014-03-20 17:49:27 -07:00
Vladimir Kozlov
d3f1dc78ef 8037226: compiler/7196199/Test7196199.java fails on 32-bit linux with MaxVectorSize > 16
Verify YMM registers after signal processing and set limit on vector's size.

Reviewed-by: iveresov, twisti
2014-03-14 17:28:58 -07:00
Igor Veresov
768beb9a23 8031321: Support Intel bit manipulation instructions
Add support for BMI1 instructions

Reviewed-by: kvn, roland
2014-03-12 11:24:26 -07:00
David Chase
9a359984c2 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
Add intrinsics using new instruction to interpreter, C1, C2, for suitable x86; add test

Reviewed-by: kvn, twisti
2013-07-02 20:42:12 -04:00
Vladimir Kozlov
cfcd28fd9d 8005522: use fast-string instructions on x86 for zeroing
Use 'rep stosb' instead of 'rep stosq' when fast-string operations are available.

Reviewed-by: twisti, roland
2013-01-03 15:09:55 -08:00
Tom Deneau
6d94ef1ee7 7184394: add intrinsics to use AES instructions
Use new x86 AES instructions for AESCrypt.

Reviewed-by: twisti, kvn, roland
2012-10-24 14:33:22 -07:00
Mikael Vidstedt
769dd50182 7197424: update copyright year to match last edit in jdk8 hotspot repository
Update copyright year to 2012 for relevant files

Reviewed-by: dholmes, coleenp
2012-10-09 10:09:34 -07:00
Paul Hohensee
f33961a1df 7142113: Add Ivy Bridge to the known Intel x86 cpu families
In vm_version_x86.hpp, add and use CPU_MODEL_IVYBRIDGE_EP, and restrict is_intel_tsc_synced_at_init() to EP models.

Reviewed-by: kvn, acorn
2012-02-16 13:50:54 -05:00
Vladimir Kozlov
b93ca70b9b Merge 2012-01-06 20:09:20 -08:00
Karen Kinnear
c323bcdca8 7125934: Add a fast unordered timestamp capability to Hotspot on x86/x64
Add rdtsc detection and inline generation.

Reviewed-by: kamg, dholmes
2012-01-01 11:17:59 -05:00
Vladimir Kozlov
b7f5d60a7e 7116452: Add support for AVX instructions
Added support for AVX extension to the x86 instruction set.

Reviewed-by: never
2011-12-14 14:54:38 -08:00
John Coomes
af31d0cf27 Merge 2011-08-19 14:08:18 -07:00
Vladimir Kozlov
90651b2666 7079329: Adjust allocation prefetching for T4
On T4 2 BIS instructions should be issued to prefetch 64 bytes

Reviewed-by: iveresov, phh, twisti
2011-08-16 16:59:46 -07:00
Vladimir Kozlov
565f8579ac 6990015: Incorrect Icache line size is used for 64 bit x86
Correct Icache::line_size for x64 and add verification code into vm_version_x86.

Reviewed-by: never, phh
2011-06-28 15:04:39 -07:00
David Katleman
079c89189f 7044486: open jdk repos have files with incorrect copyright headers, which can end up in src bundles
Reviewed-by: ohair, trims
2011-05-25 13:31:51 -07:00
Tom Deneau
899faa3fec 7035713: 3DNow Prefetch Instruction Support
The upcoming processors from AMD are the first that support 3dnow prefetch without supporting the 3dnow instruction set.

Reviewed-by: kvn
2011-04-11 15:30:31 -07:00
Stefan Karlsson
8006fe8f75 6989984: Use standard include model for Hospot
Replaced MakeDeps and the includeDB files with more standardized solutions.

Reviewed-by: coleenp, kvn, kamg
2010-11-23 13:22:55 -08:00
Vladimir Kozlov
249b1f6c4f 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14
Use hardware DIV instruction for long division by constant when it is faster than code with multiply.

Reviewed-by: never
2010-11-02 09:00:37 -07:00
Pavel Tisnovsky
af2548723c 6934483: GCC 4.5 errors "suggest parentheses around something..." when compiling with -Werror and -Wall
These are minor changes fixing compile failure when -Wall -Werror flags are used under gcc 4.5.

Reviewed-by: twisti, kvn, rasbold
2010-09-09 05:24:11 -07:00
Vladimir Kozlov
7378cf14d9 6968646: JVM crashes with SIGFPE during startup
Check that cpuid returns valid values for processor topology (not zeros).

Reviewed-by: never, twisti
2010-07-14 14:29:14 -07:00
Vladimir Kozlov
4bd0381466 6964774: Adjust optimization flags setting
Adjust performance flags settings.

Reviewed-by: never, phh
2010-06-29 10:34:00 -07:00
Erik Trimble
ba7c173659 6941466: Oracle rebranding changes for Hotspot repositories
Change all the Sun copyrights to Oracle copyright

Reviewed-by: ohair
2010-05-27 19:08:38 -07:00
Christian Thalinger
6a270f9f19 6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
These methods can be instrinsified by using bit scan, bit test, and population count instructions.

Reviewed-by: kvn, never
2009-05-06 00:27:52 -07:00
Christian Thalinger
de67e52949 6378821: bitCount() should use POPC on SPARC processors and AMD+10h
BitCount() should use POPC on SPARC processors where POPC is implemented directly in hardware.

Reviewed-by: kvn, never
2009-03-13 11:35:17 -07:00
Christian Thalinger
0723dab28b 6808589: Merge vm_version_x86_{32,64}.{cpp,hpp}
There is very much duplicated code in vm_version_x86_{32,64}.{cpp,hpp}.  Refactoring these would help maintainability.

Reviewed-by: kvn, never
2009-02-23 12:02:30 -08:00