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164 Commits

Author SHA1 Message Date
Roland Westrelin
9bcec9e523 8176506: C2: loop unswitching and unsafe accesses cause crash 
Reviewed-by: vlivanov, mcberg, kvn, simonis
 2017-05-29 18:17:49 +02:00
Vivek Deshpande
7a8af5acc8 8178811: Minimize the AVX <-> SSE transition penalty through generation of vzeroupper instruction on x86 
Reviewed-by: kvn
 2017-05-05 19:28:54 -07:00
Tobias Hartmann
a8a97e6625 8178033: C1 crashes with -XX:UseAVX = 3: "not a mov [reg+offs], reg instruction" 
Skip the EVEX prefix such that the instruction address points to the prefixed opcode.

Reviewed-by: kvn, mcberg
 2017-04-06 08:19:42 +02:00
Razvan A Lupusoru
c372aca124 8167067: Fix x86 SHA instructions to be non Vex encoded 
Reviewed-by: kvn
 2016-11-09 10:21:56 -08:00
Smita Kamath
2bc0337093 8165381: Update for x86 SHA512 using AVX2 
Add intrinsics for x86 AVX2 architecture with no SHA instructions.

Reviewed-by: kvn
 2016-10-21 10:16:09 -07:00
Michael Berg
993bfb6565 8167987: change merge context to clear for mask register usage model 
Reviewed-by: kvn
 2016-10-18 19:08:24 -07:00
Vivek Deshpande
d58e3e0324 8154122: Intrinsify fused mac operations 
Added FMA intrinsics on x86

Reviewed-by: kvn, aph, darcy
 2016-08-26 12:17:50 -07:00
Aleksey Shipilev
c6c73deca4 8157726: VarHandles/Unsafe should support sub-word atomic ops 
Reviewed-by: psandoz, vlivanov, lagergren
 2016-06-15 11:21:36 +03:00
Tomasz Wojtowicz
0a123cad8f 8154974: AVX-512 equipped inflate, has_negatives & compress intrinsics 
Reviewed-by: kvn
 2016-05-05 17:16:08 -07:00
Vivek Deshpande
8cb0a98032 8154975: Update for vectorizedMismatch with AVX512 
Reviewed-by: kvn
 2016-04-27 13:37:07 -07:00
Jan Civlin
f2e9b827d6 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available) 
Reviewed-by: kvn
 2016-04-26 21:54:21 -07:00
Michael Berg
7c4302f618 8154896: xml.transform fails intermittently on SKX 
Replace some short branches (jccb) to avoid problem when EVEX is used.

Reviewed-by: twisti, kvn
 2016-04-26 20:43:59 -07:00
Michael Berg
64cf7e6b6f 8153998: Masked vector post loops 
Masked vectorization for post loops to execute in a single iteration in place of fixup scalar loops which used to take many iterations to complete work for user loops.

Reviewed-by: twisti, kvn
 2016-04-18 15:18:14 -07:00
Shravya Rukmannagari
ad79a5ae65 8152907: Update for x86 tan and log10 in the math lib 
Optimize Math.tan() and log10() for 64 and 32 bit X86 architecture using Intel LIBM  implementation.

Reviewed-by: kvn, twisti
 2016-04-06 10:29:26 -07:00
Michael Berg
e38aef947f 8151003: Remove nds->is_valid() checks from assembler_x86.cpp 
Reviewed-by: kvn
 2016-04-05 11:37:41 -07:00
Michael Berg
06465d42a5 8152496: Blended code generation 
Reviewed-by: kvn, shade
 2016-03-29 09:53:50 -07:00
Mikael Vidstedt
d4b4dca194 8151002: Make Assembler methods vextract and vinsert match actual instructions 
Reviewed-by: kvn, vlivanov, mcberg
 2016-03-07 15:03:48 -08:00
Vivek Deshpande
40fe96de0d 8150767: Enables SHA Extensions on x86 
Add x86 intrinsics for SHA-1 and SHA-256.

Co-authored-by: Shravya Rukmannagari <shravya.rukmannagari@intel.com>
Reviewed-by: kvn, twisti
 2016-03-03 22:02:13 -08:00
Michael Berg
3ade110066 8149421: Vectorized Post Loops 
Add vectorised post loop for counted loops with vectors.

Reviewed-by: kvn
 2016-02-12 16:12:15 -08:00
Vivek Deshpande
6a52e93df7 8143353: update for x86 sin and cos in the math lib 
Optimize Math.sin() and cos() for 64 and 32 bit X86 architecture using Intel LIBM  implementation.

Reviewed-by: kvn
 2016-01-08 21:06:50 -08:00
Kishor Kharbas
790f5bded4 8143925: Enhancing CounterMode.crypt() for AES 
Add intrinsic for CounterMode.crypt() to leverage the parallel nature of AES in Counter(CTR) Mode.

Reviewed-by: kvn, ascarpino
 2015-12-28 23:11:01 -08:00
Vivek R Deshpande
453650389f 8145688: Update for x86 pow in the math lib 
Optimizes Math.pow() for 64 and 32 bit X86 architecture using Intel LIBM  implementation.

Reviewed-by: kvn
 2015-12-23 21:09:50 -08:00
Jan Civlin
a08d3805f0 8144771: Use AVX3 instructions for string compare 
Co-authored-by: Michael C Berg <michael.c.berg@intel.com>
Reviewed-by: kvn, thartmann
 2015-12-14 14:48:30 -08:00
Michael Berg
2ae7dcf853 8142980: SKX SpecJvm2008 - Derby 
Fix EVEX and AVX512 problems found by testing on 64-bit SKX and KNL EVEX enabled platforms.

Reviewed-by: iveresov, kvn, vlivanov
 2015-11-19 16:07:22 -08:00
Michael C Berg
e86e38619e 8140779: Code generation fixes for avx512 
Assembler refactoring. Abstract away instruction attributes.

Reviewed-by: kvn, roland, iveresov
 2015-11-09 11:26:41 -08:00
Tobias Hartmann
7af927f9c1 8141132: JEP 254: Compact Strings 
Adopt a more space-efficient internal representation for strings.

Co-authored-by: Brent Christian <brent.christian@oracle.com>
Co-authored-by: Vivek Deshpande <vivek.r.deshpande@intel.com>
Co-authored-by: Charlie Hunt <charlie.hunt@oracle.com>
Co-authored-by: Vladimir Kozlov <vladimir.kozlov@oracle.com>
Co-authored-by: Roger Riggs <roger.riggs@oracle.com>
Co-authored-by: Xueming Shen <xueming.shen@oracle.com>
Co-authored-by: Aleksey Shipilev <aleksey.shipilev@oracle.com>
Co-authored-by: Sandhya Viswanathan <sandhya.viswanathan@intel.com>
Reviewed-by: alanb, bdelsart, coleenp, iklam, jiangli, jrose, kevinw, naoto, pliden, roland, smarks, twisti
 2015-11-03 09:41:03 +01:00
Jan Civlin
0485593fbc 8139340: SuperWord enhancement to support vector conditional move (CMovVD) on Intel AVX cpu 
Emit vector conditional moves

Reviewed-by: kvn
 2015-10-26 19:33:31 -07:00
Vivek R Deshpande
c07f802b14 8139575: Update for x86 log in the math lib 
Add new java.lang.Math() intrinsics from x86

Reviewed-by: kvn, iveresov
 2015-10-22 21:39:25 -07:00
Dean Long
344a9becee Merge 2015-10-17 19:40:30 -04:00
Jesper Wilhelmsson
7078962b9c Merge 2015-10-15 13:28:22 +02:00
Vivek R Deshpande
5a633b1cbd 8132207: update for x86 exp in the math lib 
Add new java.lang.Math() intrinsics from x86

Reviewed-by: kvn, iveresov
 2015-10-05 20:02:40 -07:00
Jesper Wilhelmsson
e75e2e04f7 Merge 2015-10-07 01:03:24 +02:00
Vivek R Deshpande
e4f225de72 8139454: java/lang/Math/WorstCaseTests.java crashes on Linux-amd64 
Emit the form of pextrw that works with sse2

Reviewed-by: iveresov, twisti
 2015-10-12 16:35:40 -07:00
Christian Thalinger
16526e000e 8136421: JEP 243: Java-Level JVM Compiler Interface 
Reviewed-by: ihse, alanb, roland, coleenp, iveresov, kvn, kbarrett
 2015-10-08 12:49:30 -10:00
David Lindholm
1e71f67736 8080775: Better argument formatting for assert() and friends 
Reviewed-by: kbarrett, pliden
 2015-09-29 11:02:08 +02:00
Tomasz Wojtowicz
61b77b8590 8134553: CRC32C implementations for x86/x64 targets 
Reviewed-by: kvn
 2015-09-16 15:54:32 -07:00
Michael Berg
d67924dc8e 8132160: support for AVX 512 call frames and stack management 
Simplify save/restore frame on x86 systems which support EVEX.

Reviewed-by: kvn, iveresov
 2015-09-11 17:02:44 -07:00
Michael Berg
e75f5a5cde 8135028: support for vectorizing double precision sqrt 
Reviewed-by: kvn, twisti
 2015-09-09 10:34:17 -07:00
Zoltan Majo
1e55e60cb1 8076373: In 32-bit VM interpreter and compiled code process NaN values differently 
Change interpreter to use XMM registers on x86_32 if they are available. Add stubs for methods transforming from/to int/long float/double.

Reviewed-by: kvn, mcberg
 2015-08-19 08:55:18 +02:00
Michael Berg
2ef39760e6 8081247: AVX 512 extended support 
Add more support for EVEX encoding

Reviewed-by: kvn, neliasso
 2015-06-23 12:45:08 -07:00
Anthony Scarpino
c4c528df14 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration 
Reviewed-by: kvn, jrose
 2015-06-17 17:48:25 -07:00
Vladimir Kozlov
93d1573c5e 8081778: Use Intel x64 CPU instructions for RSA acceleration 
Add intrinsics for BigInteger squareToLen and mulAdd methods.

Reviewed-by: kvn, jrose
 2015-06-03 15:02:10 -07:00
Jesper Wilhelmsson
f64e5038a4 Merge 2015-05-18 17:09:47 +02:00
Michael C Berg
4fca8dbb1f 8076276: Add support for AVX512 
Reviewed-by: kvn, roland
 2015-05-08 11:49:20 -07:00
Michael C Berg
9e55e44c85 8074981: Integer/FP scalar reduction optimization 
Add scalar reduction optimization to C2 to take advantage of vector instructions in modern x86 CPUs.

Reviewed-by: kvn, twisti
 2015-04-01 18:07:50 -07:00
Erik Osterlund
a324ff0f31 8058255: Native jbyte Atomic::cmpxchg for supported x86 platforms 
Use the native cmpxchgb instruction on x86.

Reviewed-by: dholmes, kbarrett, phh
 2014-10-21 15:07:25 +02:00
Vladimir Kozlov
b9e949183d 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method 
Add new C2 intrinsic for BigInteger::multiplyToLen() on x86 in 64-bit VM.

Reviewed-by: roland
 2014-09-02 12:48:45 -07:00
Vladimir Kozlov
7764490363 8052081: Optimize generated by C2 code for Intel's Atom processor 
Allow to execute vectorization and crc32 optimization on Atom. Enable UseFPUForSpilling by default on x86.

Reviewed-by: roland
 2014-08-05 15:02:10 -07:00
David Chase
305ec3bd3f 8037816: Fix for 8036122 breaks build with Xcode5/clang 
Repaired or selectively disabled offending formats; future-proofed with additional checking

Reviewed-by: kvn, jrose, stefank
 2014-05-09 16:50:54 -04:00
Vladimir Kozlov
d9056b18ee 8041957: -XX:UseAVX=0 cause assert(UseAVX) failed 
Temporary set UseAVX=1 and UseSSE=2 in generate_get_cpu_info()

Reviewed-by: twisti
 2014-04-29 12:20:53 -07:00