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83 Commits

Author SHA1 Message Date
Vivek Deshpande
d58e3e0324 8154122: Intrinsify fused mac operations 
Added FMA intrinsics on x86

Reviewed-by: kvn, aph, darcy
 2016-08-26 12:17:50 -07:00
Tobias Hartmann
f92cc0c836 8158214: Crash with "assert(VM_Version::supports_sse4_1()) failed" if UseSSE < 4 is set 
Do not emit unsupported SSE 4.1 instructions in CRC32 intrinsic.

Reviewed-by: kvn, zmajo
 2016-06-02 13:19:05 +02:00
Jan Civlin
f2e9b827d6 8154495: SHA256 AVX2 intrinsic (when no supports_sha() available) 
Reviewed-by: kvn
 2016-04-26 21:54:21 -07:00
Coleen Phillimore
0d3e7977ae 8151939: VM_Version_init() print buffer is too small 
Increase buffer size, use logging to print out version and os information

Reviewed-by: kvn, rprotacio, mockner
 2016-04-07 16:37:35 -04:00
Mikael Vidstedt
d4b4dca194 8151002: Make Assembler methods vextract and vinsert match actual instructions 
Reviewed-by: kvn, vlivanov, mcberg
 2016-03-07 15:03:48 -08:00
Vivek Deshpande
40fe96de0d 8150767: Enables SHA Extensions on x86 
Add x86 intrinsics for SHA-1 and SHA-256.

Co-authored-by: Shravya Rukmannagari <shravya.rukmannagari@intel.com>
Reviewed-by: kvn, twisti
 2016-03-03 22:02:13 -08:00
Zoltan Majo
477c40e4eb 8146478: Node limit exceeded with -XX:AllocateInstancePrefetchLines=1073741823 
Constrain the set of accepted values for the Allocate{PrefetchLines, InstancePrefetchLines, PrefetchStepSize, PrefetchDistance} flags. Increase macro node expansion budget.

Reviewed-by: kvn
 2016-01-28 08:33:45 +01:00
Kishor Kharbas
a8fcb62829 8146581: Minor corrections to the patch submitted for earlier bug id - 8143925 
Reviewed-by: kvn
 2016-01-07 14:29:05 -08:00
Kishor Kharbas
790f5bded4 8143925: Enhancing CounterMode.crypt() for AES 
Add intrinsic for CounterMode.crypt() to leverage the parallel nature of AES in Counter(CTR) Mode.

Reviewed-by: kvn, ascarpino
 2015-12-28 23:11:01 -08:00
Andrew Haley
cee2a179e6 8143072: [JVMCI] Port JVMCI to AArch64 
Reviewed-by: gdub, rschatz, twisti, kvn
 2015-12-23 20:19:42 -10:00
Vladimir Kozlov
223668aab4 Merge 2015-12-14 10:27:33 -08:00
Jamsheed Mohammed
1f2a9c1407 6808665: Use486InstrsOnly aborts 32-bit VM 
The code supporting -XX:+/-Use486InstrsOnly was removed.

Reviewed-by: dholmes, thartmann, vlivanov
 2015-12-09 11:06:39 +01:00
Vivek R Deshpande
2d9a6cfd3f 8143355: Update for addition of vectorizedMismatch intrinsic for x86 
Co-authored-by: Liqi Yi <liqi.yi@intel.com>
Reviewed-by: kvn
 2015-12-07 16:35:07 -08:00
Zoltan Majo
d0382697c4 8143208: compiler/c1/6855215/Test6855215.java supports_sse2() failed 
Check that SSE is enabled before using SSE instructions in string-related intrinsics. Make the UseSSE42Intrinsics dependent on UseSSE >= 4.

Reviewed-by: kvn
 2015-11-23 08:11:30 +01:00
Konstantin Shefov
6de50f10f5 8131778: java disables UseAES flag when using VIS=2 on sparc 
Reviewed-by: iignatyev, kvn
 2015-11-13 18:14:41 +03:00
Michael C Berg
e86e38619e 8140779: Code generation fixes for avx512 
Assembler refactoring. Abstract away instruction attributes.

Reviewed-by: kvn, roland, iveresov
 2015-11-09 11:26:41 -08:00
Zoltan Majo
fc2a5e9d53 8078554: Compiler: implement ranges (optionally constraints) for those flags that have them missing 
Add range check or constraint where necessary.

Reviewed-by: roland, thartmann
 2015-10-09 14:21:26 +02:00
Christian Thalinger
16526e000e 8136421: JEP 243: Java-Level JVM Compiler Interface 
Reviewed-by: ihse, alanb, roland, coleenp, iveresov, kvn, kbarrett
 2015-10-08 12:49:30 -10:00
Tomasz Wojtowicz
61b77b8590 8134553: CRC32C implementations for x86/x64 targets 
Reviewed-by: kvn
 2015-09-16 15:54:32 -07:00
Michael Berg
d67924dc8e 8132160: support for AVX 512 call frames and stack management 
Simplify save/restore frame on x86 systems which support EVEX.

Reviewed-by: kvn, iveresov
 2015-09-11 17:02:44 -07:00
Ahmed Khawaja
d7b8032741 8132081: C2 support for Adler32 on SPARC 
Add C2 instrinsic support for Adler32 checksum on SPARC.

Reviewed-by: kvn
 2015-09-03 15:03:12 -07:00
Zoltan Majo
547a40e75a 8130120: Handling of SHA intrinsics inconsistent across platforms 
Introduce common warning message and common processing of SHA intrinsic-related arguments.

Reviewed-by: kvn, mcberg
 2015-07-03 09:33:04 +02:00
Andrew Haley
917f70414f Merge 2015-07-02 11:12:59 +01:00
Andrew Haley
52b991b411 8130150: Implement BigInteger.montgomeryMultiply intrinsic 
Add montgomeryMultiply intrinsics

Reviewed-by: kvn
 2015-06-16 17:31:53 +01:00
James Cheng
e2533553f6 8073583: C2 support for CRC32C on SPARC 
Reviewed-by: jrose, kvn
 2015-06-29 00:10:01 -07:00
Anthony Scarpino
c4c528df14 8073108: Use x86 and SPARC CPU instructions for GHASH acceleration 
Reviewed-by: kvn, jrose
 2015-06-17 17:48:25 -07:00
Vladimir Kozlov
93d1573c5e 8081778: Use Intel x64 CPU instructions for RSA acceleration 
Add intrinsics for BigInteger squareToLen and mulAdd methods.

Reviewed-by: kvn, jrose
 2015-06-03 15:02:10 -07:00
Michael C Berg
4fca8dbb1f 8076276: Add support for AVX512 
Reviewed-by: kvn, roland
 2015-05-08 11:49:20 -07:00
Vladimir Kozlov
b9c00b1904 Merge 2015-04-16 14:05:48 -07:00
Thomas Stuefe
704c02a180 8074860: Structured Exception Catcher missing around CreateJavaVM on Windows 
Add __try/__except around JNI_CreateJavaVM

Reviewed-by: mgronlun, dcubed
 2015-04-03 05:55:33 -04:00
Andrew Haley
1dfbc44c1f 8026049: (bf) Intrinsify ByteBuffer.put{Int, Double, Float, ...} methods 
Use unaligned Unsafe loads and stores for ByteBuffer access on platforms which support unaligned access. Add intrinsics for Unsafe.{get,put}-X-Unaligned methods.

Reviewed-by: dholmes, jrose, psandoz, kvn
 2015-03-31 12:31:18 -07:00
Paul Sandoz
c002e71565 8068977: Remove unused sun.misc.Unsafe prefetch intrinsic support 
Reviewed-by: kvn, vlivanov
 2015-02-10 21:32:05 +01:00
Vladimir Kozlov
44d1787a26 8059139: It should be possible to explicitly disable usage of TZCNT instr w/ -XX:-UseBMI1Instructions 
Reviewed-by: iveresov
 2014-10-17 15:35:25 -07:00
Vladimir Kozlov
b9e949183d 8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method 
Add new C2 intrinsic for BigInteger::multiplyToLen() on x86 in 64-bit VM.

Reviewed-by: roland
 2014-09-02 12:48:45 -07:00
Vladimir Kozlov
f813683519 8055069: TSX and RTM should be deprecated more strongly until hardware is corrected 
Require to specify UnlockExperimentalVMOptions flag together with UseRTMLocking flag on un-patched systems where CPUID allows it but is unsupported otherwise.

Reviewed-by: iveresov, fzhinkin
 2014-08-22 12:03:49 -07:00
Zhengyu Gu
8a690a1250 6424123: JVM crashes on failed 'strdup' call 
Calling os::malloc()/os::strdup() and new os::strdup_check_oom() instead of ::malloc()/::strdup() for native memory tracking purpose

Reviewed-by: coleenp, ctornqvi, kvn
 2014-08-11 10:18:09 -07:00
Vladimir Kozlov
7764490363 8052081: Optimize generated by C2 code for Intel's Atom processor 
Allow to execute vectorization and crc32 optimization on Atom. Enable UseFPUForSpilling by default on x86.

Reviewed-by: roland
 2014-08-05 15:02:10 -07:00
Daniel D. Daugherty
a06d36cada 8049717: expose L1_data_cache_line_size for diagnostic/sanity checks 
Add support for VM_Version::L1_data_cache_line_size().

Reviewed-by: dsimms, kvn, dholmes
 2014-07-15 07:33:49 -07:00
Goetz Lindenmaier
f2051ed6fa 8048241: Introduce umbrella header os.inline.hpp and clean up includes 
Reviewed-by: coleenp, dholmes, lfoltan
 2014-06-26 16:05:15 +02:00
James Cheng
395560c428 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC 
Add C2 SHA intrinsics on SPARC

Reviewed-by: kvn, roland
 2014-06-11 11:05:10 -07:00
David Chase
305ec3bd3f 8037816: Fix for 8036122 breaks build with Xcode5/clang 
Repaired or selectively disabled offending formats; future-proofed with additional checking

Reviewed-by: kvn, jrose, stefank
 2014-05-09 16:50:54 -04:00
Vladimir Kozlov
d9056b18ee 8041957: -XX:UseAVX=0 cause assert(UseAVX) failed 
Temporary set UseAVX=1 and UseSSE=2 in generate_get_cpu_info()

Reviewed-by: twisti
 2014-04-29 12:20:53 -07:00
Vladimir Kozlov
77d38feb95 8038633: crash in VM_Version::get_processor_features() on startup 
Windows need an exception wrapper around getPsrInfo_stub() call in order to properly handle SEGV for YMM registers test.

Reviewed-by: iveresov, iignatyev
 2014-03-31 13:08:03 -07:00
Vladimir Kozlov
97a51c5c2a 8031320: Use Intel RTM instructions for locks 
Use RTM for inflated locks and stack locks.

Reviewed-by: iveresov, twisti, roland, dcubed
 2014-03-20 17:49:27 -07:00
Vladimir Kozlov
d3f1dc78ef 8037226: compiler/7196199/Test7196199.java fails on 32-bit linux with MaxVectorSize > 16 
Verify YMM registers after signal processing and set limit on vector's size.

Reviewed-by: iveresov, twisti
 2014-03-14 17:28:58 -07:00
Igor Veresov
768beb9a23 8031321: Support Intel bit manipulation instructions 
Add support for BMI1 instructions

Reviewed-by: kvn, roland
 2014-03-12 11:24:26 -07:00
David Chase
9a359984c2 7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32 
Add intrinsics using new instruction to interpreter, C1, C2, for suitable x86; add test

Reviewed-by: kvn, twisti
 2013-07-02 20:42:12 -04:00
Vladimir Kozlov
8915295560 8003878: compiler/7196199 test failed on OS X since 8b54, jdk7u12b01 
Limit vectors size to 16 bytes on BSD until the problem is fixed

Reviewed-by: twisti
 2013-01-23 15:11:03 -08:00
Karen Kinnear
4ce43bafa5 Merge 2013-01-16 18:23:37 -05:00
Aleksey Shipilev
0614ed6542 8003985: Support @Contended Annotation - JEP 142 
HotSpot changes to support @Contended annotation.

Reviewed-by: coleenp, kvn, jrose
 2013-01-14 15:17:47 +01:00