a324ff0f31
Use the native cmpxchgb instruction on x86. Reviewed-by: dholmes, kbarrett, phh
140 lines
7.2 KiB
C++
140 lines
7.2 KiB
C++
/*
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* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#ifndef SHARE_VM_RUNTIME_ATOMIC_HPP
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#define SHARE_VM_RUNTIME_ATOMIC_HPP
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#include "memory/allocation.hpp"
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class Atomic : AllStatic {
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private:
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static jbyte cmpxchg_general(jbyte exchange_value, volatile jbyte* dest, jbyte compare_value);
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public:
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// Atomic operations on jlong types are not available on all 32-bit
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// platforms. If atomic ops on jlongs are defined here they must only
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// be used from code that verifies they are available at runtime and
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// can provide an alternative action if not - see supports_cx8() for
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// a means to test availability.
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// The memory operations that are mentioned with each of the atomic
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// function families come from src/share/vm/runtime/orderAccess.hpp,
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// e.g., <fence> is described in that file and is implemented by the
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// OrderAccess::fence() function. See that file for the gory details
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// on the Memory Access Ordering Model.
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// All of the atomic operations that imply a read-modify-write action
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// guarantee a two-way memory barrier across that operation. Historically
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// these semantics reflect the strength of atomic operations that are
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// provided on SPARC/X86. We assume that strength is necessary unless
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// we can prove that a weaker form is sufficiently safe.
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// Atomically store to a location
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inline static void store (jbyte store_value, jbyte* dest);
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inline static void store (jshort store_value, jshort* dest);
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inline static void store (jint store_value, jint* dest);
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// See comment above about using jlong atomics on 32-bit platforms
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inline static void store (jlong store_value, jlong* dest);
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inline static void store_ptr(intptr_t store_value, intptr_t* dest);
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inline static void store_ptr(void* store_value, void* dest);
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inline static void store (jbyte store_value, volatile jbyte* dest);
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inline static void store (jshort store_value, volatile jshort* dest);
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inline static void store (jint store_value, volatile jint* dest);
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// See comment above about using jlong atomics on 32-bit platforms
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inline static void store (jlong store_value, volatile jlong* dest);
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inline static void store_ptr(intptr_t store_value, volatile intptr_t* dest);
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inline static void store_ptr(void* store_value, volatile void* dest);
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// See comment above about using jlong atomics on 32-bit platforms
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inline static jlong load(volatile jlong* src);
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// Atomically add to a location. Returns updated value. add*() provide:
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// <fence> add-value-to-dest <membar StoreLoad|StoreStore>
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inline static jint add (jint add_value, volatile jint* dest);
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inline static size_t add (size_t add_value, volatile size_t* dest);
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inline static intptr_t add_ptr(intptr_t add_value, volatile intptr_t* dest);
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inline static void* add_ptr(intptr_t add_value, volatile void* dest);
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// See comment above about using jlong atomics on 32-bit platforms
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static jlong add (jlong add_value, volatile jlong* dest);
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// Atomically increment location. inc*() provide:
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// <fence> increment-dest <membar StoreLoad|StoreStore>
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inline static void inc (volatile jint* dest);
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static void inc (volatile jshort* dest);
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inline static void inc (volatile size_t* dest);
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inline static void inc_ptr(volatile intptr_t* dest);
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inline static void inc_ptr(volatile void* dest);
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// Atomically decrement a location. dec*() provide:
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// <fence> decrement-dest <membar StoreLoad|StoreStore>
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inline static void dec (volatile jint* dest);
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static void dec (volatile jshort* dest);
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inline static void dec (volatile size_t* dest);
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inline static void dec_ptr(volatile intptr_t* dest);
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inline static void dec_ptr(volatile void* dest);
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// Performs atomic exchange of *dest with exchange_value. Returns old
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// prior value of *dest. xchg*() provide:
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// <fence> exchange-value-with-dest <membar StoreLoad|StoreStore>
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inline static jint xchg (jint exchange_value, volatile jint* dest);
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static unsigned int xchg (unsigned int exchange_value, volatile unsigned int* dest);
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inline static intptr_t xchg_ptr(intptr_t exchange_value, volatile intptr_t* dest);
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inline static void* xchg_ptr(void* exchange_value, volatile void* dest);
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// Performs atomic compare of *dest and compare_value, and exchanges
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// *dest with exchange_value if the comparison succeeded. Returns prior
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// value of *dest. cmpxchg*() provide:
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// <fence> compare-and-exchange <membar StoreLoad|StoreStore>
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inline static jbyte cmpxchg (jbyte exchange_value, volatile jbyte* dest, jbyte compare_value);
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inline static jint cmpxchg (jint exchange_value, volatile jint* dest, jint compare_value);
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// See comment above about using jlong atomics on 32-bit platforms
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inline static jlong cmpxchg (jlong exchange_value, volatile jlong* dest, jlong compare_value);
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static unsigned int cmpxchg (unsigned int exchange_value, volatile unsigned int* dest, unsigned int compare_value);
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inline static intptr_t cmpxchg_ptr(intptr_t exchange_value, volatile intptr_t* dest, intptr_t compare_value);
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inline static void* cmpxchg_ptr(void* exchange_value, volatile void* dest, void* compare_value);
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};
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// To use Atomic::inc(jshort* dest) and Atomic::dec(jshort* dest), the address must be specially
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// aligned, such that (*dest) occupies the upper 16 bits of an aligned 32-bit word. The best way to
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// achieve is to place your short value next to another short value, which doesn't need atomic ops.
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//
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// Example
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// ATOMIC_SHORT_PAIR(
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// volatile short _refcount, // needs atomic operation
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// unsigned short _length // number of UTF8 characters in the symbol (does not need atomic op)
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// );
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#ifdef VM_LITTLE_ENDIAN
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#define ATOMIC_SHORT_PAIR(atomic_decl, non_atomic_decl) \
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non_atomic_decl; \
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atomic_decl
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#else
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#define ATOMIC_SHORT_PAIR(atomic_decl, non_atomic_decl) \
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atomic_decl; \
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non_atomic_decl
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#endif
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#endif // SHARE_VM_RUNTIME_ATOMIC_HPP
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