314 lines
7.4 KiB
Plaintext
314 lines
7.4 KiB
Plaintext
//
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// Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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//
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// This code is free software; you can redistribute it and/or modify it
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// under the terms of the GNU General Public License version 2 only, as
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// published by the Free Software Foundation.
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//
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// This code is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// version 2 for more details (a copy is included in the LICENSE file that
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// accompanied this code).
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//
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// You should have received a copy of the GNU General Public License version
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// 2 along with this work; if not, write to the Free Software Foundation,
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// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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//
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// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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// or visit www.oracle.com if you need additional information or have any
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// questions.
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//
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//
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// Get the raw thread ID from %g7
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.inline _raw_thread_id, 0
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.register %g7,#scratch
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.volatile
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mov %g7, %o0
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.nonvolatile
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.end
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// Clear SPARC fprs.FEF DU and DL bits --
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// allows the kernel to avoid saving FPU state at context-switch time.
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// Use for state-transition points (into _thread_blocked) or when
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// parking.
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.inline _mark_fpu_nosave, 0
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.volatile
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wr %g0, 0, %fprs
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.nonvolatile
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.end
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// Support for jint Atomic::xchg(jint exchange_value, volatile jint* dest).
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//
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// Arguments:
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// exchange_value: O0
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// dest: O1
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//
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// Results:
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// O0: the value previously stored in dest
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.inline _Atomic_swap32, 2
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.volatile
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swap [%o1],%o0
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.nonvolatile
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.end
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// Support for intptr_t Atomic::xchg_ptr(intptr_t exchange_value, volatile intptr_t * dest).
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//
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// 64-bit
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//
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// Arguments:
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// exchange_value: O0
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// dest: O1
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//
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// Results:
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// O0: the value previously stored in dest
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.inline _Atomic_swap64, 2
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.volatile
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1:
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mov %o0, %o3
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ldx [%o1], %o2
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casx [%o1], %o2, %o3
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cmp %o2, %o3
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bne %xcc, 1b
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nop
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mov %o2, %o0
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.nonvolatile
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.end
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// Support for jint Atomic::cmpxchg(jint exchange_value,
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// volatile jint* dest,
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// jint compare_value)
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//
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// Arguments:
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// exchange_value: O0
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// dest: O1
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// compare_value: O2
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//
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// Results:
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// O0: the value previously stored in dest
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.inline _Atomic_cas32, 3
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.volatile
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cas [%o1], %o2, %o0
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.nonvolatile
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.end
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// Support for intptr_t Atomic::cmpxchg_ptr(intptr_t exchange_value,
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// volatile intptr_t* dest,
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// intptr_t compare_value)
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//
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// 64-bit
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//
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// Arguments:
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// exchange_value: O0
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// dest: O1
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// compare_value: O2
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//
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// Results:
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// O0: the value previously stored in dest
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.inline _Atomic_cas64, 3
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.volatile
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casx [%o1], %o2, %o0
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.nonvolatile
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.end
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// Support for jlong Atomic::cmpxchg(jlong exchange_value,
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// volatile jlong* dest,
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// jlong compare_value)
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//
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// 32-bit calling conventions
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//
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// Arguments:
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// exchange_value: O1:O0
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// dest: O2
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// compare_value: O4:O3
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//
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// Results:
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// O1:O0: the value previously stored in dest
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.inline _Atomic_casl, 3
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.volatile
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sllx %o0, 32, %o0
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srl %o1, 0, %o1
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or %o0,%o1,%o0
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sllx %o3, 32, %o3
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srl %o4, 0, %o4
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or %o3,%o4,%o3
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casx [%o2], %o3, %o0
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srl %o0, 0, %o1
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srlx %o0, 32, %o0
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.nonvolatile
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.end
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// Support for jlong Atomic::load and Atomic::store on v9.
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//
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// void _Atomic_move_long_v9(volatile jlong* src, volatile jlong* dst)
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//
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// Arguments:
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// src: O0
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// dest: O1
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//
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// Overwrites O2
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.inline _Atomic_move_long_v9,2
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.volatile
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ldx [%o0], %o2
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stx %o2, [%o1]
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.nonvolatile
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.end
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// Support for jint Atomic::add(jint add_value, volatile jint* dest).
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//
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// Arguments:
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// add_value: O0 (e.g., +1 or -1)
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// dest: O1
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//
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// Results:
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// O0: the new value stored in dest
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//
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// Overwrites O3
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.inline _Atomic_add32, 2
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.volatile
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2:
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ld [%o1], %o2
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add %o0, %o2, %o3
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cas [%o1], %o2, %o3
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cmp %o2, %o3
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bne 2b
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nop
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add %o0, %o2, %o0
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.nonvolatile
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.end
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// Support for intptr_t Atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest)
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//
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// 64-bit
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//
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// Arguments:
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// add_value: O0 (e.g., +1 or -1)
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// dest: O1
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//
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// Results:
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// O0: the new value stored in dest
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//
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// Overwrites O3
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.inline _Atomic_add64, 2
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.volatile
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3:
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ldx [%o1], %o2
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add %o0, %o2, %o3
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casx [%o1], %o2, %o3
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cmp %o2, %o3
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bne %xcc, 3b
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nop
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add %o0, %o2, %o0
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.nonvolatile
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.end
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// Support for void OrderAccess::acquire()
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// The method is intentionally empty.
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// It exists for the sole purpose of generating
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// a C/C++ sequence point over which the compiler won't
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// reorder code.
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.inline _OrderAccess_acquire,0
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.volatile
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.nonvolatile
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.end
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// Support for void OrderAccess::fence()
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.inline _OrderAccess_fence,0
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.volatile
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membar #StoreLoad
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.nonvolatile
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.end
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// Support for void Prefetch::read(void *loc, intx interval)
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//
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// Prefetch for several reads.
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.inline _Prefetch_read, 2
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.volatile
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prefetch [%o0+%o1], 0
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.nonvolatile
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.end
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// Support for void Prefetch::write(void *loc, intx interval)
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//
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// Prefetch for several writes.
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.inline _Prefetch_write, 2
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.volatile
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prefetch [%o0+%o1], 2
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.nonvolatile
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.end
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// Support for void Copy::conjoint_jlongs_atomic(jlong* from, jlong* to, size_t count)
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//
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// 32-bit
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//
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// Arguments:
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// from: O0
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// to: O1
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// count: O2 treated as signed
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//
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// Clobbers:
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// long_value: O2, O3
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// count: O4
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//
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// if (from > to) {
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// while (--count >= 0) {
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// *to++ = *from++;
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// }
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// } else {
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// while (--count >= 0) {
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// to[count] = from[count];
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// }
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// }
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.inline _Copy_conjoint_jlongs_atomic, 3
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.volatile
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cmp %o0, %o1
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bleu 4f
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sll %o2, 3, %o4
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ba 2f
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1:
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subcc %o4, 8, %o4
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std %o2, [%o1]
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add %o0, 8, %o0
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add %o1, 8, %o1
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2:
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bge,a 1b
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ldd [%o0], %o2
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ba 5f
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nop
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3:
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std %o2, [%o1+%o4]
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4:
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subcc %o4, 8, %o4
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bge,a 3b
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ldd [%o0+%o4], %o2
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5:
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.nonvolatile
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.end
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