301 lines
8.7 KiB
C++
301 lines
8.7 KiB
C++
/*
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* Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2015, Red Hat Inc. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#include "precompiled.hpp"
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#include "asm/macroAssembler.hpp"
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#include "asm/macroAssembler.inline.hpp"
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#include "memory/resourceArea.hpp"
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#include "runtime/java.hpp"
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#include "runtime/stubCodeGenerator.hpp"
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#include "vm_version_aarch64.hpp"
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#ifdef TARGET_OS_FAMILY_linux
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# include "os_linux.inline.hpp"
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#endif
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#ifndef BUILTIN_SIM
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#include <sys/auxv.h>
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#include <asm/hwcap.h>
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#else
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#define getauxval(hwcap) 0
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#endif
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#ifndef HWCAP_AES
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#define HWCAP_AES (1<<3)
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#endif
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#ifndef HWCAP_PMULL
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#define HWCAP_PMULL (1<<4)
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#endif
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#ifndef HWCAP_SHA1
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#define HWCAP_SHA1 (1<<5)
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#endif
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#ifndef HWCAP_SHA2
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#define HWCAP_SHA2 (1<<6)
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#endif
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#ifndef HWCAP_CRC32
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#define HWCAP_CRC32 (1<<7)
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#endif
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int VM_Version::_cpu;
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int VM_Version::_model;
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int VM_Version::_model2;
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int VM_Version::_variant;
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int VM_Version::_revision;
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int VM_Version::_stepping;
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int VM_Version::_cpuFeatures;
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const char* VM_Version::_features_str = "";
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static BufferBlob* stub_blob;
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static const int stub_size = 550;
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extern "C" {
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typedef void (*getPsrInfo_stub_t)(void*);
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}
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static getPsrInfo_stub_t getPsrInfo_stub = NULL;
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class VM_Version_StubGenerator: public StubCodeGenerator {
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public:
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VM_Version_StubGenerator(CodeBuffer *c) : StubCodeGenerator(c) {}
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address generate_getPsrInfo() {
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StubCodeMark mark(this, "VM_Version", "getPsrInfo_stub");
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# define __ _masm->
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address start = __ pc();
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#ifdef BUILTIN_SIM
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__ c_stub_prolog(1, 0, MacroAssembler::ret_type_void);
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#endif
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// void getPsrInfo(VM_Version::CpuidInfo* cpuid_info);
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address entry = __ pc();
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// TODO : redefine fields in CpuidInfo and generate
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// code to fill them in
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__ ret(lr);
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# undef __
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return start;
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}
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};
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void VM_Version::get_processor_features() {
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_supports_cx8 = true;
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_supports_atomic_getset4 = true;
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_supports_atomic_getadd4 = true;
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_supports_atomic_getset8 = true;
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_supports_atomic_getadd8 = true;
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if (FLAG_IS_DEFAULT(AllocatePrefetchDistance))
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FLAG_SET_DEFAULT(AllocatePrefetchDistance, 256);
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if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize))
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FLAG_SET_DEFAULT(AllocatePrefetchStepSize, 64);
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FLAG_SET_DEFAULT(PrefetchScanIntervalInBytes, 256);
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FLAG_SET_DEFAULT(PrefetchFieldsAhead, 256);
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FLAG_SET_DEFAULT(PrefetchCopyIntervalInBytes, 256);
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FLAG_SET_DEFAULT(UseSSE42Intrinsics, true);
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unsigned long auxv = getauxval(AT_HWCAP);
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char buf[512];
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_cpuFeatures = auxv;
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int cpu_lines = 0;
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if (FILE *f = fopen("/proc/cpuinfo", "r")) {
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char buf[128], *p;
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while (fgets(buf, sizeof (buf), f) != NULL) {
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if (p = strchr(buf, ':')) {
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long v = strtol(p+1, NULL, 0);
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if (strncmp(buf, "CPU implementer", sizeof "CPU implementer" - 1) == 0) {
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_cpu = v;
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cpu_lines++;
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} else if (strncmp(buf, "CPU variant", sizeof "CPU variant" - 1) == 0) {
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_variant = v;
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} else if (strncmp(buf, "CPU part", sizeof "CPU part" - 1) == 0) {
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if (_model != v) _model2 = _model;
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_model = v;
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} else if (strncmp(buf, "CPU revision", sizeof "CPU revision" - 1) == 0) {
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_revision = v;
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}
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}
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}
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fclose(f);
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}
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// Enable vendor specific features
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if (_cpu == CPU_CAVIUM && _variant == 0) _cpuFeatures |= CPU_DMB_ATOMICS;
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if (_cpu == CPU_ARM && (_model == 0xd03 || _model2 == 0xd03)) _cpuFeatures |= CPU_A53MAC;
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// If an olde style /proc/cpuinfo (cpu_lines == 1) then if _model is an A57 (0xd07)
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// we assume the worst and assume we could be on a big little system and have
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// undisclosed A53 cores which we could be swapped to at any stage
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if (_cpu == CPU_ARM && cpu_lines == 1 && _model == 0xd07) _cpuFeatures |= CPU_A53MAC;
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sprintf(buf, "0x%02x:0x%x:0x%03x:%d", _cpu, _variant, _model, _revision);
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if (_model2) sprintf(buf+strlen(buf), "(0x%03x)", _model2);
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if (auxv & HWCAP_ASIMD) strcat(buf, ", simd");
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if (auxv & HWCAP_CRC32) strcat(buf, ", crc");
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if (auxv & HWCAP_AES) strcat(buf, ", aes");
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if (auxv & HWCAP_SHA1) strcat(buf, ", sha1");
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if (auxv & HWCAP_SHA2) strcat(buf, ", sha256");
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_features_str = os::strdup(buf);
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if (FLAG_IS_DEFAULT(UseCRC32)) {
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UseCRC32 = (auxv & HWCAP_CRC32) != 0;
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}
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if (UseCRC32 && (auxv & HWCAP_CRC32) == 0) {
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warning("UseCRC32 specified, but not supported on this CPU");
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}
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if (auxv & HWCAP_AES) {
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UseAES = UseAES || FLAG_IS_DEFAULT(UseAES);
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UseAESIntrinsics =
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UseAESIntrinsics || (UseAES && FLAG_IS_DEFAULT(UseAESIntrinsics));
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if (UseAESIntrinsics && !UseAES) {
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warning("UseAESIntrinsics enabled, but UseAES not, enabling");
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UseAES = true;
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}
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} else {
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if (UseAES) {
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warning("UseAES specified, but not supported on this CPU");
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}
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if (UseAESIntrinsics) {
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warning("UseAESIntrinsics specified, but not supported on this CPU");
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}
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}
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if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
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UseCRC32Intrinsics = true;
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}
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if (auxv & HWCAP_CRC32) {
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if (FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) {
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FLAG_SET_DEFAULT(UseCRC32CIntrinsics, true);
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}
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} else if (UseCRC32CIntrinsics) {
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warning("CRC32C is not available on the CPU");
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FLAG_SET_DEFAULT(UseCRC32CIntrinsics, false);
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}
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if (auxv & (HWCAP_SHA1 | HWCAP_SHA2)) {
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if (FLAG_IS_DEFAULT(UseSHA)) {
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FLAG_SET_DEFAULT(UseSHA, true);
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}
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} else if (UseSHA) {
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warning("SHA instructions are not available on this CPU");
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FLAG_SET_DEFAULT(UseSHA, false);
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}
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if (UseSHA && (auxv & HWCAP_SHA1)) {
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if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
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FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
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}
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} else if (UseSHA1Intrinsics) {
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warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU.");
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FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
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}
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if (UseSHA && (auxv & HWCAP_SHA2)) {
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if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
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FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
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}
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} else if (UseSHA256Intrinsics) {
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warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU.");
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FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
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}
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if (UseSHA512Intrinsics) {
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warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU.");
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FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
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}
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if (!(UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics)) {
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FLAG_SET_DEFAULT(UseSHA, false);
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}
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if (auxv & HWCAP_PMULL) {
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if (FLAG_IS_DEFAULT(UseGHASHIntrinsics)) {
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FLAG_SET_DEFAULT(UseGHASHIntrinsics, true);
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}
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} else if (UseGHASHIntrinsics) {
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warning("GHASH intrinsics are not available on this CPU");
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FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
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}
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// This machine allows unaligned memory accesses
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if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
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FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
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}
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if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
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UseMultiplyToLenIntrinsic = true;
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}
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if (FLAG_IS_DEFAULT(UseBarriersForVolatile)) {
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UseBarriersForVolatile = (_cpuFeatures & CPU_DMB_ATOMICS) != 0;
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}
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if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
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UsePopCountInstruction = true;
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}
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if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
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UseMontgomeryMultiplyIntrinsic = true;
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}
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if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
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UseMontgomerySquareIntrinsic = true;
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}
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#ifdef COMPILER2
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if (FLAG_IS_DEFAULT(OptoScheduling)) {
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OptoScheduling = true;
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}
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#endif
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}
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void VM_Version::initialize() {
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ResourceMark rm;
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stub_blob = BufferBlob::create("getPsrInfo_stub", stub_size);
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if (stub_blob == NULL) {
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vm_exit_during_initialization("Unable to allocate getPsrInfo_stub");
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}
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CodeBuffer c(stub_blob);
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VM_Version_StubGenerator g(&c);
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getPsrInfo_stub = CAST_TO_FN_PTR(getPsrInfo_stub_t,
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g.generate_getPsrInfo());
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get_processor_features();
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}
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