43 lines
1.9 KiB
C++
43 lines
1.9 KiB
C++
/*
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* Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#ifndef CPU_X86_VM_TEMPLATETABLE_X86_64_HPP
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#define CPU_X86_VM_TEMPLATETABLE_X86_64_HPP
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static void prepare_invoke(int byte_no,
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Register method, // linked method (or i-klass)
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Register index = noreg, // itable index, MethodType, etc.
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Register recv = noreg, // if caller wants to see it
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Register flags = noreg // if caller wants to test it
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);
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static void invokevirtual_helper(Register index, Register recv,
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Register flags);
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static void volatile_barrier(Assembler::Membar_mask_bits order_constraint);
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// Helpers
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static void index_check(Register array, Register index);
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static void index_check_without_pop(Register array, Register index);
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#endif // CPU_X86_VM_TEMPLATETABLE_X86_64_HPP
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