fc7f4197f1
Reviewed-by: kvn
489 lines
16 KiB
C++
489 lines
16 KiB
C++
/*
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* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
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* Copyright 2012, 2014 SAP AG. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#include "precompiled.hpp"
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#include "asm/assembler.inline.hpp"
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#include "asm/macroAssembler.inline.hpp"
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#include "compiler/disassembler.hpp"
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#include "memory/resourceArea.hpp"
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#include "runtime/java.hpp"
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#include "runtime/stubCodeGenerator.hpp"
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#include "utilities/defaultStream.hpp"
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#include "vm_version_ppc.hpp"
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#ifdef TARGET_OS_FAMILY_aix
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# include "os_aix.inline.hpp"
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#endif
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#ifdef TARGET_OS_FAMILY_linux
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# include "os_linux.inline.hpp"
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#endif
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# include <sys/sysinfo.h>
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int VM_Version::_features = VM_Version::unknown_m;
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int VM_Version::_measured_cache_line_size = 128; // default value
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const char* VM_Version::_features_str = "";
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bool VM_Version::_is_determine_features_test_running = false;
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#define MSG(flag) \
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if (flag && !FLAG_IS_DEFAULT(flag)) \
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jio_fprintf(defaultStream::error_stream(), \
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"warning: -XX:+" #flag " requires -XX:+UseSIGTRAP\n" \
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" -XX:+" #flag " will be disabled!\n");
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void VM_Version::initialize() {
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// Test which instructions are supported and measure cache line size.
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determine_features();
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// If PowerArchitecturePPC64 hasn't been specified explicitly determine from features.
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if (FLAG_IS_DEFAULT(PowerArchitecturePPC64)) {
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if (VM_Version::has_popcntw()) {
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FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 7);
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} else if (VM_Version::has_cmpb()) {
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FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 6);
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} else if (VM_Version::has_popcntb()) {
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FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 5);
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} else {
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FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 0);
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}
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}
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guarantee(PowerArchitecturePPC64 == 0 || PowerArchitecturePPC64 == 5 ||
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PowerArchitecturePPC64 == 6 || PowerArchitecturePPC64 == 7,
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"PowerArchitecturePPC64 should be 0, 5, 6 or 7");
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if (!UseSIGTRAP) {
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MSG(TrapBasedICMissChecks);
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MSG(TrapBasedNotEntrantChecks);
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MSG(TrapBasedNullChecks);
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FLAG_SET_ERGO(bool, TrapBasedNotEntrantChecks, false);
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FLAG_SET_ERGO(bool, TrapBasedNullChecks, false);
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FLAG_SET_ERGO(bool, TrapBasedICMissChecks, false);
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}
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#ifdef COMPILER2
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if (!UseSIGTRAP) {
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MSG(TrapBasedRangeChecks);
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FLAG_SET_ERGO(bool, TrapBasedRangeChecks, false);
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}
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// On Power6 test for section size.
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if (PowerArchitecturePPC64 == 6) {
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determine_section_size();
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// TODO: PPC port } else {
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// TODO: PPC port PdScheduling::power6SectorSize = 0x20;
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}
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MaxVectorSize = 8;
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#endif
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// Create and print feature-string.
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char buf[(num_features+1) * 16]; // Max 16 chars per feature.
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jio_snprintf(buf, sizeof(buf),
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"ppc64%s%s%s%s%s%s%s%s",
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(has_fsqrt() ? " fsqrt" : ""),
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(has_isel() ? " isel" : ""),
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(has_lxarxeh() ? " lxarxeh" : ""),
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(has_cmpb() ? " cmpb" : ""),
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//(has_mftgpr()? " mftgpr" : ""),
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(has_popcntb() ? " popcntb" : ""),
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(has_popcntw() ? " popcntw" : ""),
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(has_fcfids() ? " fcfids" : ""),
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(has_vand() ? " vand" : "")
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// Make sure number of %s matches num_features!
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);
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_features_str = strdup(buf);
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NOT_PRODUCT(if (Verbose) print_features(););
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// PPC64 supports 8-byte compare-exchange operations (see
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// Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr)
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// and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
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_supports_cx8 = true;
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UseSSE = 0; // Only on x86 and x64
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intx cache_line_size = _measured_cache_line_size;
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if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) AllocatePrefetchStyle = 1;
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if (AllocatePrefetchStyle == 4) {
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AllocatePrefetchStepSize = cache_line_size; // Need exact value.
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if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 12; // Use larger blocks by default.
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if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 2*cache_line_size; // Default is not defined?
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} else {
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if (cache_line_size > AllocatePrefetchStepSize) AllocatePrefetchStepSize = cache_line_size;
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if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 3; // Optimistic value.
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if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 3*cache_line_size; // Default is not defined?
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}
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assert(AllocatePrefetchLines > 0, "invalid value");
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if (AllocatePrefetchLines < 1) // Set valid value in product VM.
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AllocatePrefetchLines = 1; // Conservative value.
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if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size)
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AllocatePrefetchStyle = 1; // Fall back if inappropriate.
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assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive");
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}
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void VM_Version::print_features() {
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tty->print_cr("Version: %s cache_line_size = %d", cpu_features(), get_cache_line_size());
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}
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#ifdef COMPILER2
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// Determine section size on power6: If section size is 8 instructions,
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// there should be a difference between the two testloops of ~15 %. If
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// no difference is detected the section is assumed to be 32 instructions.
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void VM_Version::determine_section_size() {
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int unroll = 80;
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const int code_size = (2* unroll * 32 + 100)*BytesPerInstWord;
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// Allocate space for the code.
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ResourceMark rm;
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CodeBuffer cb("detect_section_size", code_size, 0);
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MacroAssembler* a = new MacroAssembler(&cb);
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uint32_t *code = (uint32_t *)a->pc();
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// Emit code.
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void (*test1)() = (void(*)())(void *)a->function_entry();
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Label l1;
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a->li(R4, 1);
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a->sldi(R4, R4, 28);
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a->b(l1);
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a->align(CodeEntryAlignment);
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a->bind(l1);
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for (int i = 0; i < unroll; i++) {
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// Schleife 1
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// ------- sector 0 ------------
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// ;; 0
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a->nop(); // 1
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a->fpnop0(); // 2
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a->fpnop1(); // 3
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a->addi(R4,R4, -1); // 4
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// ;; 1
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a->nop(); // 5
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a->fmr(F6, F6); // 6
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a->fmr(F7, F7); // 7
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a->endgroup(); // 8
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// ------- sector 8 ------------
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// ;; 2
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a->nop(); // 9
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a->nop(); // 10
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a->fmr(F8, F8); // 11
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a->fmr(F9, F9); // 12
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// ;; 3
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a->nop(); // 13
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a->fmr(F10, F10); // 14
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a->fmr(F11, F11); // 15
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a->endgroup(); // 16
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// -------- sector 16 -------------
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// ;; 4
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a->nop(); // 17
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a->nop(); // 18
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a->fmr(F15, F15); // 19
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a->fmr(F16, F16); // 20
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// ;; 5
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a->nop(); // 21
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a->fmr(F17, F17); // 22
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a->fmr(F18, F18); // 23
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a->endgroup(); // 24
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// ------- sector 24 ------------
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// ;; 6
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a->nop(); // 25
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a->nop(); // 26
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a->fmr(F19, F19); // 27
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a->fmr(F20, F20); // 28
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// ;; 7
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a->nop(); // 29
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a->fmr(F21, F21); // 30
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a->fmr(F22, F22); // 31
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a->brnop0(); // 32
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// ------- sector 32 ------------
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}
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// ;; 8
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a->cmpdi(CCR0, R4, unroll); // 33
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a->bge(CCR0, l1); // 34
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a->blr();
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// Emit code.
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void (*test2)() = (void(*)())(void *)a->function_entry();
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// uint32_t *code = (uint32_t *)a->pc();
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Label l2;
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a->li(R4, 1);
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a->sldi(R4, R4, 28);
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a->b(l2);
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a->align(CodeEntryAlignment);
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a->bind(l2);
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for (int i = 0; i < unroll; i++) {
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// Schleife 2
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// ------- sector 0 ------------
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// ;; 0
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a->brnop0(); // 1
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a->nop(); // 2
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//a->cmpdi(CCR0, R4, unroll);
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a->fpnop0(); // 3
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a->fpnop1(); // 4
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a->addi(R4,R4, -1); // 5
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// ;; 1
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a->nop(); // 6
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a->fmr(F6, F6); // 7
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a->fmr(F7, F7); // 8
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// ------- sector 8 ---------------
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// ;; 2
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a->endgroup(); // 9
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// ;; 3
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a->nop(); // 10
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a->nop(); // 11
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a->fmr(F8, F8); // 12
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// ;; 4
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a->fmr(F9, F9); // 13
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a->nop(); // 14
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a->fmr(F10, F10); // 15
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// ;; 5
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a->fmr(F11, F11); // 16
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// -------- sector 16 -------------
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// ;; 6
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a->endgroup(); // 17
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// ;; 7
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a->nop(); // 18
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a->nop(); // 19
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a->fmr(F15, F15); // 20
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// ;; 8
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a->fmr(F16, F16); // 21
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a->nop(); // 22
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a->fmr(F17, F17); // 23
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// ;; 9
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a->fmr(F18, F18); // 24
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// -------- sector 24 -------------
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// ;; 10
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a->endgroup(); // 25
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// ;; 11
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a->nop(); // 26
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a->nop(); // 27
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a->fmr(F19, F19); // 28
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// ;; 12
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a->fmr(F20, F20); // 29
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a->nop(); // 30
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a->fmr(F21, F21); // 31
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// ;; 13
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a->fmr(F22, F22); // 32
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}
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// -------- sector 32 -------------
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// ;; 14
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a->cmpdi(CCR0, R4, unroll); // 33
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a->bge(CCR0, l2); // 34
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a->blr();
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uint32_t *code_end = (uint32_t *)a->pc();
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a->flush();
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double loop1_seconds,loop2_seconds, rel_diff;
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uint64_t start1, stop1;
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start1 = os::current_thread_cpu_time(false);
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(*test1)();
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stop1 = os::current_thread_cpu_time(false);
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loop1_seconds = (stop1- start1) / (1000 *1000 *1000.0);
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start1 = os::current_thread_cpu_time(false);
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(*test2)();
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stop1 = os::current_thread_cpu_time(false);
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loop2_seconds = (stop1 - start1) / (1000 *1000 *1000.0);
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rel_diff = (loop2_seconds - loop1_seconds) / loop1_seconds *100;
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if (PrintAssembly) {
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ttyLocker ttyl;
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tty->print_cr("Decoding section size detection stub at " INTPTR_FORMAT " before execution:", code);
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Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
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tty->print_cr("Time loop1 :%f", loop1_seconds);
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tty->print_cr("Time loop2 :%f", loop2_seconds);
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tty->print_cr("(time2 - time1) / time1 = %f %%", rel_diff);
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if (rel_diff > 12.0) {
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tty->print_cr("Section Size 8 Instructions");
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} else{
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tty->print_cr("Section Size 32 Instructions or Power5");
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}
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}
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#if 0 // TODO: PPC port
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// Set sector size (if not set explicitly).
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if (FLAG_IS_DEFAULT(Power6SectorSize128PPC64)) {
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if (rel_diff > 12.0) {
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PdScheduling::power6SectorSize = 0x20;
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} else {
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PdScheduling::power6SectorSize = 0x80;
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}
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} else if (Power6SectorSize128PPC64) {
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PdScheduling::power6SectorSize = 0x80;
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} else {
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PdScheduling::power6SectorSize = 0x20;
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}
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#endif
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if (UsePower6SchedulerPPC64) Unimplemented();
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}
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#endif // COMPILER2
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void VM_Version::determine_features() {
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#if defined(ABI_ELFv2)
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const int code_size = (num_features+1+2*7)*BytesPerInstWord; // TODO(asmundak): calculation is incorrect.
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#else
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// 7 InstWords for each call (function descriptor + blr instruction).
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const int code_size = (num_features+1+2*7)*BytesPerInstWord;
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#endif
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int features = 0;
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// create test area
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enum { BUFFER_SIZE = 2*4*K }; // Needs to be >=2* max cache line size (cache line size can't exceed min page size).
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char test_area[BUFFER_SIZE];
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char *mid_of_test_area = &test_area[BUFFER_SIZE>>1];
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// Allocate space for the code.
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ResourceMark rm;
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CodeBuffer cb("detect_cpu_features", code_size, 0);
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MacroAssembler* a = new MacroAssembler(&cb);
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// Must be set to true so we can generate the test code.
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_features = VM_Version::all_features_m;
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// Emit code.
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void (*test)(address addr, uint64_t offset)=(void(*)(address addr, uint64_t offset))(void *)a->function_entry();
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uint32_t *code = (uint32_t *)a->pc();
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// Don't use R0 in ldarx.
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// Keep R3_ARG1 unmodified, it contains &field (see below).
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// Keep R4_ARG2 unmodified, it contains offset = 0 (see below).
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a->fsqrt(F3, F4); // code[0] -> fsqrt_m
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a->fsqrts(F3, F4); // code[1] -> fsqrts_m
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a->isel(R7, R5, R6, 0); // code[2] -> isel_m
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a->ldarx_unchecked(R7, R3_ARG1, R4_ARG2, 1); // code[3] -> lxarx_m
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a->cmpb(R7, R5, R6); // code[4] -> bcmp
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//a->mftgpr(R7, F3); // code[5] -> mftgpr
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a->popcntb(R7, R5); // code[6] -> popcntb
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a->popcntw(R7, R5); // code[7] -> popcntw
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a->fcfids(F3, F4); // code[8] -> fcfids
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a->vand(VR0, VR0, VR0); // code[9] -> vand
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a->blr();
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// Emit function to set one cache line to zero. Emit function descriptor and get pointer to it.
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void (*zero_cacheline_func_ptr)(char*) = (void(*)(char*))(void *)a->function_entry();
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a->dcbz(R3_ARG1); // R3_ARG1 = addr
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a->blr();
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uint32_t *code_end = (uint32_t *)a->pc();
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a->flush();
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_features = VM_Version::unknown_m;
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// Print the detection code.
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if (PrintAssembly) {
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ttyLocker ttyl;
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tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " before execution:", code);
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Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
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}
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// Measure cache line size.
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memset(test_area, 0xFF, BUFFER_SIZE); // Fill test area with 0xFF.
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(*zero_cacheline_func_ptr)(mid_of_test_area); // Call function which executes dcbz to the middle.
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int count = 0; // count zeroed bytes
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for (int i = 0; i < BUFFER_SIZE; i++) if (test_area[i] == 0) count++;
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guarantee(is_power_of_2(count), "cache line size needs to be a power of 2");
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_measured_cache_line_size = count;
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// Execute code. Illegal instructions will be replaced by 0 in the signal handler.
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VM_Version::_is_determine_features_test_running = true;
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(*test)((address)mid_of_test_area, (uint64_t)0);
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VM_Version::_is_determine_features_test_running = false;
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// determine which instructions are legal.
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int feature_cntr = 0;
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if (code[feature_cntr++]) features |= fsqrt_m;
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if (code[feature_cntr++]) features |= fsqrts_m;
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if (code[feature_cntr++]) features |= isel_m;
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if (code[feature_cntr++]) features |= lxarxeh_m;
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if (code[feature_cntr++]) features |= cmpb_m;
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//if(code[feature_cntr++])features |= mftgpr_m;
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if (code[feature_cntr++]) features |= popcntb_m;
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if (code[feature_cntr++]) features |= popcntw_m;
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if (code[feature_cntr++]) features |= fcfids_m;
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if (code[feature_cntr++]) features |= vand_m;
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// Print the detection code.
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if (PrintAssembly) {
|
|
ttyLocker ttyl;
|
|
tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", code);
|
|
Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
|
|
}
|
|
|
|
_features = features;
|
|
}
|
|
|
|
|
|
static int saved_features = 0;
|
|
|
|
void VM_Version::allow_all() {
|
|
saved_features = _features;
|
|
_features = all_features_m;
|
|
}
|
|
|
|
void VM_Version::revert() {
|
|
_features = saved_features;
|
|
}
|