143 lines
5.6 KiB
Plaintext
143 lines
5.6 KiB
Plaintext
dnl Copyright (c) 2016, Red Hat Inc. All rights reserved.
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dnl DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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dnl
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dnl This code is free software; you can redistribute it and/or modify it
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dnl under the terms of the GNU General Public License version 2 only, as
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dnl published by the Free Software Foundation.
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dnl
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dnl This code is distributed in the hope that it will be useful, but WITHOUT
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dnl ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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dnl FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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dnl version 2 for more details (a copy is included in the LICENSE file that
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dnl accompanied this code).
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dnl
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dnl You should have received a copy of the GNU General Public License version
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dnl 2 along with this work; if not, write to the Free Software Foundation,
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dnl Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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dnl
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dnl Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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dnl or visit www.oracle.com if you need additional information or have any
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dnl questions.
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dnl
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dnl
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dnl Process this file with m4 cas.m4 to generate the CAE and wCAS
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dnl instructions used in aarch64.ad.
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dnl
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// BEGIN This section of the file is automatically generated. Do not edit --------------
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// Sundry CAS operations. Note that release is always true,
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// regardless of the memory ordering of the CAS. This is because we
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// need the volatile case to be sequentially consistent but there is
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// no trailing StoreLoad barrier emitted by C2. Unfortunately we
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// can't check the type of memory ordering here, so we always emit a
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// STLXR.
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// This section is generated from aarch64_ad_cas.m4
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define(`CAS_INSN',
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`
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instruct compareAndExchange$1$5(iReg$2NoSp res, indirect mem, iReg$2 oldval, iReg$2 newval, rFlagsReg cr) %{
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match(Set res (CompareAndExchange$1 mem (Binary oldval newval)));
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ifelse($5,Acq,' predicate(needs_acquiring_load_exclusive(n));
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ins_cost(VOLATILE_REF_COST);`,' ins_cost(2 * VOLATILE_REF_COST);`)
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effect(TEMP_DEF res, KILL cr);
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format %{
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"cmpxchg $res = $mem, $oldval, $newval\t# ($3, weak) if $mem == $oldval then $mem <-- $newval"
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%}
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ins_encode %{
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__ cmpxchg($mem$$Register, $oldval$$Register, $newval$$Register,
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Assembler::$4, /*acquire*/ ifelse($5,Acq,true,false), /*release*/ true,
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/*weak*/ false, $res$$Register);
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%}
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ins_pipe(pipe_slow);
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%}')dnl
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define(`CAS_INSN4',
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`
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instruct compareAndExchange$1$7(iReg$2NoSp res, indirect mem, iReg$2 oldval, iReg$2 newval, rFlagsReg cr) %{
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match(Set res (CompareAndExchange$1 mem (Binary oldval newval)));
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ifelse($7,Acq,' predicate(needs_acquiring_load_exclusive(n));
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ins_cost(VOLATILE_REF_COST);`,' ins_cost(2 * VOLATILE_REF_COST);`)
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effect(TEMP_DEF res, KILL cr);
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format %{
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"cmpxchg $res = $mem, $oldval, $newval\t# ($3, weak) if $mem == $oldval then $mem <-- $newval"
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%}
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ins_encode %{
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__ $5(rscratch2, $oldval$$Register);
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__ cmpxchg($mem$$Register, rscratch2, $newval$$Register,
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Assembler::$4, /*acquire*/ ifelse($5,Acq,true,false), /*release*/ true,
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/*weak*/ false, $res$$Register);
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__ $6($res$$Register, $res$$Register);
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%}
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ins_pipe(pipe_slow);
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%}')dnl
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CAS_INSN4(B,I,byte,byte,uxtbw,sxtbw)
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CAS_INSN4(S,I,short,halfword,uxthw,sxthw)
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CAS_INSN(I,I,int,word)
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CAS_INSN(L,L,long,xword)
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CAS_INSN(N,N,narrow oop,word)
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CAS_INSN(P,P,ptr,xword)
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dnl
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dnl CAS_INSN4(B,I,byte,byte,uxtbw,sxtbw,Acq)
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dnl CAS_INSN4(S,I,short,halfword,uxthw,sxthw,Acq)
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dnl CAS_INSN(I,I,int,word,Acq)
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dnl CAS_INSN(L,L,long,xword,Acq)
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dnl CAS_INSN(N,N,narrow oop,word,Acq)
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dnl CAS_INSN(P,P,ptr,xword,Acq)
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dnl
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define(`CAS_INSN2',
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`
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instruct weakCompareAndSwap$1$6(iRegINoSp res, indirect mem, iReg$2 oldval, iReg$2 newval, rFlagsReg cr) %{
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match(Set res (WeakCompareAndSwap$1 mem (Binary oldval newval)));
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ifelse($6,Acq,' predicate(needs_acquiring_load_exclusive(n));
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ins_cost(VOLATILE_REF_COST);`,' ins_cost(2 * VOLATILE_REF_COST);`)
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effect(KILL cr);
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format %{
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"cmpxchg $res = $mem, $oldval, $newval\t# ($3, weak) if $mem == $oldval then $mem <-- $newval"
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"csetw $res, EQ\t# $res <-- (EQ ? 1 : 0)"
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%}
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ins_encode %{
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__ uxt$5(rscratch2, $oldval$$Register);
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__ cmpxchg($mem$$Register, rscratch2, $newval$$Register,
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Assembler::$4, /*acquire*/ ifelse($6,Acq,true,false), /*release*/ true,
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/*weak*/ true, noreg);
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__ csetw($res$$Register, Assembler::EQ);
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%}
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ins_pipe(pipe_slow);
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%}')dnl
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define(`CAS_INSN3',
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`
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instruct weakCompareAndSwap$1$5(iRegINoSp res, indirect mem, iReg$2 oldval, iReg$2 newval, rFlagsReg cr) %{
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match(Set res (WeakCompareAndSwap$1 mem (Binary oldval newval)));
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ifelse($5,Acq,' predicate(needs_acquiring_load_exclusive(n));
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ins_cost(VOLATILE_REF_COST);`,' ins_cost(2 * VOLATILE_REF_COST);`)
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effect(KILL cr);
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format %{
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"cmpxchg $res = $mem, $oldval, $newval\t# ($3, weak) if $mem == $oldval then $mem <-- $newval"
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"csetw $res, EQ\t# $res <-- (EQ ? 1 : 0)"
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%}
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ins_encode %{
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__ cmpxchg($mem$$Register, $oldval$$Register, $newval$$Register,
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Assembler::$4, /*acquire*/ ifelse($5,Acq,true,false), /*release*/ true,
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/*weak*/ true, noreg);
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__ csetw($res$$Register, Assembler::EQ);
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%}
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ins_pipe(pipe_slow);
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%}')dnl
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CAS_INSN2(B,I,byte,byte,bw)
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CAS_INSN2(S,I,short,halfword,hw)
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CAS_INSN3(I,I,int,word)
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CAS_INSN3(L,L,long,xword)
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CAS_INSN3(N,N,narrow oop,word)
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CAS_INSN3(P,P,ptr,xword)
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dnl CAS_INSN2(B,I,byte,byte,bw,Acq)
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dnl CAS_INSN2(S,I,short,halfword,hw,Acq)
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dnl CAS_INSN3(I,I,int,word,Acq)
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dnl CAS_INSN3(L,L,long,xword,Acq)
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dnl CAS_INSN3(N,N,narrow oop,word,Acq)
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dnl CAS_INSN3(P,P,ptr,xword,Acq)
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dnl
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// END This section of the file is automatically generated. Do not edit --------------
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