eb85b8da32
Reviewed-by: chagedorn, kvn
1401 lines
53 KiB
C++
1401 lines
53 KiB
C++
/*
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* Copyright (c) 1998, 2020, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#include "precompiled.hpp"
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#include "asm/macroAssembler.inline.hpp"
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#include "memory/allocation.inline.hpp"
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#include "oops/compressedOops.hpp"
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#include "opto/ad.hpp"
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#include "opto/block.hpp"
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#include "opto/c2compiler.hpp"
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#include "opto/callnode.hpp"
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#include "opto/cfgnode.hpp"
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#include "opto/machnode.hpp"
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#include "opto/runtime.hpp"
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#include "opto/chaitin.hpp"
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#include "runtime/sharedRuntime.hpp"
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// Optimization - Graph Style
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// Check whether val is not-null-decoded compressed oop,
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// i.e. will grab into the base of the heap if it represents NULL.
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static bool accesses_heap_base_zone(Node *val) {
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if (CompressedOops::base() != NULL) { // Implies UseCompressedOops.
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if (val && val->is_Mach()) {
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if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
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// This assumes all Decodes with TypePtr::NotNull are matched to nodes that
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// decode NULL to point to the heap base (Decode_NN).
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if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
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return true;
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}
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}
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// Must recognize load operation with Decode matched in memory operand.
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// We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
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// returns true everywhere else. On PPC, no such memory operands
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// exist, therefore we did not yet implement a check for such operands.
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NOT_AIX(Unimplemented());
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}
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}
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return false;
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}
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static bool needs_explicit_null_check_for_read(Node *val) {
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// On some OSes (AIX) the page at address 0 is only write protected.
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// If so, only Store operations will trap.
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if (os::zero_page_read_protected()) {
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return false; // Implicit null check will work.
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}
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// Also a read accessing the base of a heap-based compressed heap will trap.
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if (accesses_heap_base_zone(val) && // Hits the base zone page.
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CompressedOops::use_implicit_null_checks()) { // Base zone page is protected.
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return false;
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}
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return true;
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}
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//------------------------------implicit_null_check----------------------------
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// Detect implicit-null-check opportunities. Basically, find NULL checks
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// with suitable memory ops nearby. Use the memory op to do the NULL check.
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// I can generate a memory op if there is not one nearby.
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// The proj is the control projection for the not-null case.
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// The val is the pointer being checked for nullness or
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// decodeHeapOop_not_null node if it did not fold into address.
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void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
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// Assume if null check need for 0 offset then always needed
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// Intel solaris doesn't support any null checks yet and no
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// mechanism exists (yet) to set the switches at an os_cpu level
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if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
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// Make sure the ptr-is-null path appears to be uncommon!
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float f = block->end()->as_MachIf()->_prob;
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if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
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if( f > PROB_UNLIKELY_MAG(4) ) return;
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uint bidx = 0; // Capture index of value into memop
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bool was_store; // Memory op is a store op
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// Get the successor block for if the test ptr is non-null
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Block* not_null_block; // this one goes with the proj
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Block* null_block;
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if (block->get_node(block->number_of_nodes()-1) == proj) {
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null_block = block->_succs[0];
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not_null_block = block->_succs[1];
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} else {
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assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
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not_null_block = block->_succs[0];
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null_block = block->_succs[1];
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}
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while (null_block->is_Empty() == Block::empty_with_goto) {
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null_block = null_block->_succs[0];
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}
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// Search the exception block for an uncommon trap.
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// (See Parse::do_if and Parse::do_ifnull for the reason
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// we need an uncommon trap. Briefly, we need a way to
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// detect failure of this optimization, as in 6366351.)
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{
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bool found_trap = false;
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for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
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Node* nn = null_block->get_node(i1);
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if (nn->is_MachCall() &&
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nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
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const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
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if (trtype->isa_int() && trtype->is_int()->is_con()) {
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jint tr_con = trtype->is_int()->get_con();
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Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
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Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
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assert((int)reason < (int)BitsPerInt, "recode bit map");
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if (is_set_nth_bit(allowed_reasons, (int) reason)
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&& action != Deoptimization::Action_none) {
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// This uncommon trap is sure to recompile, eventually.
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// When that happens, C->too_many_traps will prevent
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// this transformation from happening again.
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found_trap = true;
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}
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}
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break;
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}
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}
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if (!found_trap) {
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// We did not find an uncommon trap.
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return;
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}
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}
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// Check for decodeHeapOop_not_null node which did not fold into address
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bool is_decoden = ((intptr_t)val) & 1;
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val = (Node*)(((intptr_t)val) & ~1);
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assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
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(val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
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// Search the successor block for a load or store who's base value is also
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// the tested value. There may be several.
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MachNode *best = NULL; // Best found so far
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for (DUIterator i = val->outs(); val->has_out(i); i++) {
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Node *m = val->out(i);
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if( !m->is_Mach() ) continue;
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MachNode *mach = m->as_Mach();
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was_store = false;
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int iop = mach->ideal_Opcode();
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switch( iop ) {
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case Op_LoadB:
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case Op_LoadUB:
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case Op_LoadUS:
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case Op_LoadD:
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case Op_LoadF:
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case Op_LoadI:
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case Op_LoadL:
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case Op_LoadP:
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case Op_LoadN:
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case Op_LoadS:
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case Op_LoadKlass:
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case Op_LoadNKlass:
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case Op_LoadRange:
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case Op_LoadD_unaligned:
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case Op_LoadL_unaligned:
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assert(mach->in(2) == val, "should be address");
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break;
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case Op_StoreB:
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case Op_StoreC:
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case Op_StoreCM:
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case Op_StoreD:
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case Op_StoreF:
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case Op_StoreI:
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case Op_StoreL:
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case Op_StoreP:
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case Op_StoreN:
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case Op_StoreNKlass:
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was_store = true; // Memory op is a store op
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// Stores will have their address in slot 2 (memory in slot 1).
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// If the value being nul-checked is in another slot, it means we
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// are storing the checked value, which does NOT check the value!
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if( mach->in(2) != val ) continue;
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break; // Found a memory op?
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case Op_StrComp:
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case Op_StrEquals:
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case Op_StrIndexOf:
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case Op_StrIndexOfChar:
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case Op_AryEq:
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case Op_StrInflatedCopy:
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case Op_StrCompressedCopy:
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case Op_EncodeISOArray:
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case Op_HasNegatives:
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// Not a legit memory op for implicit null check regardless of
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// embedded loads
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continue;
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default: // Also check for embedded loads
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if( !mach->needs_anti_dependence_check() )
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continue; // Not an memory op; skip it
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if( must_clone[iop] ) {
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// Do not move nodes which produce flags because
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// RA will try to clone it to place near branch and
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// it will cause recompilation, see clone_node().
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continue;
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}
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{
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// Check that value is used in memory address in
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// instructions with embedded load (CmpP val1,(val2+off)).
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Node* base;
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Node* index;
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const MachOper* oper = mach->memory_inputs(base, index);
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if (oper == NULL || oper == (MachOper*)-1) {
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continue; // Not an memory op; skip it
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}
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if (val == base ||
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(val == index && val->bottom_type()->isa_narrowoop())) {
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break; // Found it
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} else {
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continue; // Skip it
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}
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}
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break;
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}
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// On some OSes (AIX) the page at address 0 is only write protected.
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// If so, only Store operations will trap.
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// But a read accessing the base of a heap-based compressed heap will trap.
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if (!was_store && needs_explicit_null_check_for_read(val)) {
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continue;
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}
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// Check that node's control edge is not-null block's head or dominates it,
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// otherwise we can't hoist it because there are other control dependencies.
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Node* ctrl = mach->in(0);
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if (ctrl != NULL && !(ctrl == not_null_block->head() ||
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get_block_for_node(ctrl)->dominates(not_null_block))) {
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continue;
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}
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// check if the offset is not too high for implicit exception
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{
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intptr_t offset = 0;
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const TypePtr *adr_type = NULL; // Do not need this return value here
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const Node* base = mach->get_base_and_disp(offset, adr_type);
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if (base == NULL || base == NodeSentinel) {
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// Narrow oop address doesn't have base, only index.
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// Give up if offset is beyond page size or if heap base is not protected.
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if (val->bottom_type()->isa_narrowoop() &&
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(MacroAssembler::needs_explicit_null_check(offset) ||
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!CompressedOops::use_implicit_null_checks()))
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continue;
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// cannot reason about it; is probably not implicit null exception
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} else {
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const TypePtr* tptr;
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if ((UseCompressedOops || UseCompressedClassPointers) &&
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(CompressedOops::shift() == 0 || CompressedKlassPointers::shift() == 0)) {
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// 32-bits narrow oop can be the base of address expressions
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tptr = base->get_ptr_type();
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} else {
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// only regular oops are expected here
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tptr = base->bottom_type()->is_ptr();
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}
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// Give up if offset is not a compile-time constant.
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if (offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot)
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continue;
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offset += tptr->_offset; // correct if base is offseted
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// Give up if reference is beyond page size.
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if (MacroAssembler::needs_explicit_null_check(offset))
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continue;
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// Give up if base is a decode node and the heap base is not protected.
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if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN &&
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!CompressedOops::use_implicit_null_checks())
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continue;
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}
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}
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// Check ctrl input to see if the null-check dominates the memory op
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Block *cb = get_block_for_node(mach);
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cb = cb->_idom; // Always hoist at least 1 block
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if( !was_store ) { // Stores can be hoisted only one block
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while( cb->_dom_depth > (block->_dom_depth + 1))
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cb = cb->_idom; // Hoist loads as far as we want
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// The non-null-block should dominate the memory op, too. Live
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// range spilling will insert a spill in the non-null-block if it is
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// needs to spill the memory op for an implicit null check.
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if (cb->_dom_depth == (block->_dom_depth + 1)) {
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if (cb != not_null_block) continue;
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cb = cb->_idom;
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}
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}
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if( cb != block ) continue;
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// Found a memory user; see if it can be hoisted to check-block
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uint vidx = 0; // Capture index of value into memop
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uint j;
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for( j = mach->req()-1; j > 0; j-- ) {
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if( mach->in(j) == val ) {
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vidx = j;
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// Ignore DecodeN val which could be hoisted to where needed.
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if( is_decoden ) continue;
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}
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// Block of memory-op input
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Block *inb = get_block_for_node(mach->in(j));
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Block *b = block; // Start from nul check
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while( b != inb && b->_dom_depth > inb->_dom_depth )
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b = b->_idom; // search upwards for input
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// See if input dominates null check
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if( b != inb )
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break;
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}
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if( j > 0 )
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continue;
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Block *mb = get_block_for_node(mach);
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// Hoisting stores requires more checks for the anti-dependence case.
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// Give up hoisting if we have to move the store past any load.
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if( was_store ) {
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Block *b = mb; // Start searching here for a local load
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// mach use (faulting) trying to hoist
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// n might be blocker to hoisting
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while( b != block ) {
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uint k;
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for( k = 1; k < b->number_of_nodes(); k++ ) {
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Node *n = b->get_node(k);
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if( n->needs_anti_dependence_check() &&
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n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
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break; // Found anti-dependent load
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}
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if( k < b->number_of_nodes() )
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break; // Found anti-dependent load
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// Make sure control does not do a merge (would have to check allpaths)
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if( b->num_preds() != 2 ) break;
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b = get_block_for_node(b->pred(1)); // Move up to predecessor block
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}
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if( b != block ) continue;
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}
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// Make sure this memory op is not already being used for a NullCheck
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Node *e = mb->end();
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if( e->is_MachNullCheck() && e->in(1) == mach )
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continue; // Already being used as a NULL check
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// Found a candidate! Pick one with least dom depth - the highest
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// in the dom tree should be closest to the null check.
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if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
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best = mach;
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bidx = vidx;
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}
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}
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// No candidate!
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if (best == NULL) {
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return;
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}
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// ---- Found an implicit null check
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#ifndef PRODUCT
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extern int implicit_null_checks;
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implicit_null_checks++;
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#endif
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if( is_decoden ) {
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// Check if we need to hoist decodeHeapOop_not_null first.
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Block *valb = get_block_for_node(val);
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if( block != valb && block->_dom_depth < valb->_dom_depth ) {
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// Hoist it up to the end of the test block.
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valb->find_remove(val);
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block->add_inst(val);
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map_node_to_block(val, block);
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// DecodeN on x86 may kill flags. Check for flag-killing projections
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// that also need to be hoisted.
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for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
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Node* n = val->fast_out(j);
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if( n->is_MachProj() ) {
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get_block_for_node(n)->find_remove(n);
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block->add_inst(n);
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map_node_to_block(n, block);
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}
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}
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}
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}
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// Hoist the memory candidate up to the end of the test block.
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Block *old_block = get_block_for_node(best);
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old_block->find_remove(best);
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block->add_inst(best);
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map_node_to_block(best, block);
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// Move the control dependence if it is pinned to not-null block.
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// Don't change it in other cases: NULL or dominating control.
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if (best->in(0) == not_null_block->head()) {
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// Set it to control edge of null check.
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best->set_req(0, proj->in(0)->in(0));
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}
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// Check for flag-killing projections that also need to be hoisted
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// Should be DU safe because no edge updates.
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for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
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Node* n = best->fast_out(j);
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if( n->is_MachProj() ) {
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get_block_for_node(n)->find_remove(n);
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block->add_inst(n);
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map_node_to_block(n, block);
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}
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}
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// proj==Op_True --> ne test; proj==Op_False --> eq test.
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// One of two graph shapes got matched:
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// (IfTrue (If (Bool NE (CmpP ptr NULL))))
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// (IfFalse (If (Bool EQ (CmpP ptr NULL))))
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// NULL checks are always branch-if-eq. If we see a IfTrue projection
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// then we are replacing a 'ne' test with a 'eq' NULL check test.
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// We need to flip the projections to keep the same semantics.
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if( proj->Opcode() == Op_IfTrue ) {
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// Swap order of projections in basic block to swap branch targets
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Node *tmp1 = block->get_node(block->end_idx()+1);
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Node *tmp2 = block->get_node(block->end_idx()+2);
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block->map_node(tmp2, block->end_idx()+1);
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block->map_node(tmp1, block->end_idx()+2);
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Node *tmp = new Node(C->top()); // Use not NULL input
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tmp1->replace_by(tmp);
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tmp2->replace_by(tmp1);
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tmp->replace_by(tmp2);
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tmp->destruct(NULL);
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}
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// Remove the existing null check; use a new implicit null check instead.
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// Since schedule-local needs precise def-use info, we need to correct
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// it as well.
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Node *old_tst = proj->in(0);
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MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
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block->map_node(nul_chk, block->end_idx());
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map_node_to_block(nul_chk, block);
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// Redirect users of old_test to nul_chk
|
|
for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
|
|
old_tst->last_out(i2)->set_req(0, nul_chk);
|
|
// Clean-up any dead code
|
|
for (uint i3 = 0; i3 < old_tst->req(); i3++) {
|
|
Node* in = old_tst->in(i3);
|
|
old_tst->set_req(i3, NULL);
|
|
if (in->outcnt() == 0) {
|
|
// Remove dead input node
|
|
in->disconnect_inputs(C);
|
|
block->find_remove(in);
|
|
}
|
|
}
|
|
|
|
latency_from_uses(nul_chk);
|
|
latency_from_uses(best);
|
|
|
|
// insert anti-dependences to defs in this block
|
|
if (! best->needs_anti_dependence_check()) {
|
|
for (uint k = 1; k < block->number_of_nodes(); k++) {
|
|
Node *n = block->get_node(k);
|
|
if (n->needs_anti_dependence_check() &&
|
|
n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) {
|
|
// Found anti-dependent load
|
|
insert_anti_dependences(block, n);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
//------------------------------select-----------------------------------------
|
|
// Select a nice fellow from the worklist to schedule next. If there is only
|
|
// one choice, then use it. Projections take top priority for correctness
|
|
// reasons - if I see a projection, then it is next. There are a number of
|
|
// other special cases, for instructions that consume condition codes, et al.
|
|
// These are chosen immediately. Some instructions are required to immediately
|
|
// precede the last instruction in the block, and these are taken last. Of the
|
|
// remaining cases (most), choose the instruction with the greatest latency
|
|
// (that is, the most number of pseudo-cycles required to the end of the
|
|
// routine). If there is a tie, choose the instruction with the most inputs.
|
|
Node* PhaseCFG::select(
|
|
Block* block,
|
|
Node_List &worklist,
|
|
GrowableArray<int> &ready_cnt,
|
|
VectorSet &next_call,
|
|
uint sched_slot,
|
|
intptr_t* recalc_pressure_nodes) {
|
|
|
|
// If only a single entry on the stack, use it
|
|
uint cnt = worklist.size();
|
|
if (cnt == 1) {
|
|
Node *n = worklist[0];
|
|
worklist.map(0,worklist.pop());
|
|
return n;
|
|
}
|
|
|
|
uint choice = 0; // Bigger is most important
|
|
uint latency = 0; // Bigger is scheduled first
|
|
uint score = 0; // Bigger is better
|
|
int idx = -1; // Index in worklist
|
|
int cand_cnt = 0; // Candidate count
|
|
bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
|
|
|
|
for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
|
|
// Order in worklist is used to break ties.
|
|
// See caller for how this is used to delay scheduling
|
|
// of induction variable increments to after the other
|
|
// uses of the phi are scheduled.
|
|
Node *n = worklist[i]; // Get Node on worklist
|
|
|
|
int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
|
|
if( n->is_Proj() || // Projections always win
|
|
n->Opcode()== Op_Con || // So does constant 'Top'
|
|
iop == Op_CreateEx || // Create-exception must start block
|
|
iop == Op_CheckCastPP
|
|
) {
|
|
worklist.map(i,worklist.pop());
|
|
return n;
|
|
}
|
|
|
|
// Final call in a block must be adjacent to 'catch'
|
|
Node *e = block->end();
|
|
if( e->is_Catch() && e->in(0)->in(0) == n )
|
|
continue;
|
|
|
|
// Memory op for an implicit null check has to be at the end of the block
|
|
if( e->is_MachNullCheck() && e->in(1) == n )
|
|
continue;
|
|
|
|
// Schedule IV increment last.
|
|
if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
|
|
// Cmp might be matched into CountedLoopEnd node.
|
|
Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
|
|
if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
|
|
continue;
|
|
}
|
|
}
|
|
|
|
uint n_choice = 2;
|
|
|
|
// See if this instruction is consumed by a branch. If so, then (as the
|
|
// branch is the last instruction in the basic block) force it to the
|
|
// end of the basic block
|
|
if ( must_clone[iop] ) {
|
|
// See if any use is a branch
|
|
bool found_machif = false;
|
|
|
|
for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
|
|
Node* use = n->fast_out(j);
|
|
|
|
// The use is a conditional branch, make them adjacent
|
|
if (use->is_MachIf() && get_block_for_node(use) == block) {
|
|
found_machif = true;
|
|
break;
|
|
}
|
|
|
|
// More than this instruction pending for successor to be ready,
|
|
// don't choose this if other opportunities are ready
|
|
if (ready_cnt.at(use->_idx) > 1)
|
|
n_choice = 1;
|
|
}
|
|
|
|
// loop terminated, prefer not to use this instruction
|
|
if (found_machif)
|
|
continue;
|
|
}
|
|
|
|
// See if this has a predecessor that is "must_clone", i.e. sets the
|
|
// condition code. If so, choose this first
|
|
for (uint j = 0; j < n->req() ; j++) {
|
|
Node *inn = n->in(j);
|
|
if (inn) {
|
|
if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
|
|
n_choice = 3;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
// MachTemps should be scheduled last so they are near their uses
|
|
if (n->is_MachTemp()) {
|
|
n_choice = 1;
|
|
}
|
|
|
|
uint n_latency = get_latency_for_node(n);
|
|
uint n_score = n->req(); // Many inputs get high score to break ties
|
|
|
|
if (OptoRegScheduling && block_size_threshold_ok) {
|
|
if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
|
|
_regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
|
|
_regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
|
|
// simulate the notion that we just picked this node to schedule
|
|
n->add_flag(Node::Flag_is_scheduled);
|
|
// now caculate its effect upon the graph if we did
|
|
adjust_register_pressure(n, block, recalc_pressure_nodes, false);
|
|
// return its state for finalize in case somebody else wins
|
|
n->remove_flag(Node::Flag_is_scheduled);
|
|
// now save the two final pressure components of register pressure, limiting pressure calcs to short size
|
|
short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
|
|
short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
|
|
recalc_pressure_nodes[n->_idx] = int_pressure;
|
|
recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
|
|
}
|
|
|
|
if (_scheduling_for_pressure) {
|
|
latency = n_latency;
|
|
if (n_choice != 3) {
|
|
// Now evaluate each register pressure component based on threshold in the score.
|
|
// In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
|
|
// on a single instruction, but we might see it shrink on both banks.
|
|
// For each use of register that has a register class that is over the high pressure limit, we build n_score up for
|
|
// live ranges that terminate on this instruction.
|
|
if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
|
|
short int_pressure = (short)recalc_pressure_nodes[n->_idx];
|
|
n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
|
|
}
|
|
if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
|
|
short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
|
|
n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
|
|
}
|
|
} else {
|
|
// make sure we choose these candidates
|
|
score = 0;
|
|
}
|
|
}
|
|
}
|
|
|
|
// Keep best latency found
|
|
cand_cnt++;
|
|
if (choice < n_choice ||
|
|
(choice == n_choice &&
|
|
((StressLCM && C->randomized_select(cand_cnt)) ||
|
|
(!StressLCM &&
|
|
(latency < n_latency ||
|
|
(latency == n_latency &&
|
|
(score < n_score))))))) {
|
|
choice = n_choice;
|
|
latency = n_latency;
|
|
score = n_score;
|
|
idx = i; // Also keep index in worklist
|
|
}
|
|
} // End of for all ready nodes in worklist
|
|
|
|
guarantee(idx >= 0, "index should be set");
|
|
Node *n = worklist[(uint)idx]; // Get the winner
|
|
|
|
worklist.map((uint)idx, worklist.pop()); // Compress worklist
|
|
return n;
|
|
}
|
|
|
|
//-------------------------adjust_register_pressure----------------------------
|
|
void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
|
|
PhaseLive* liveinfo = _regalloc->get_live();
|
|
IndexSet* liveout = liveinfo->live(block);
|
|
// first adjust the register pressure for the sources
|
|
for (uint i = 1; i < n->req(); i++) {
|
|
bool lrg_ends = false;
|
|
Node *src_n = n->in(i);
|
|
if (src_n == NULL) continue;
|
|
if (!src_n->is_Mach()) continue;
|
|
uint src = _regalloc->_lrg_map.find(src_n);
|
|
if (src == 0) continue;
|
|
LRG& lrg_src = _regalloc->lrgs(src);
|
|
// detect if the live range ends or not
|
|
if (liveout->member(src) == false) {
|
|
lrg_ends = true;
|
|
for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
|
|
Node* m = src_n->fast_out(j); // Get user
|
|
if (m == n) continue;
|
|
if (!m->is_Mach()) continue;
|
|
MachNode *mach = m->as_Mach();
|
|
bool src_matches = false;
|
|
int iop = mach->ideal_Opcode();
|
|
|
|
switch (iop) {
|
|
case Op_StoreB:
|
|
case Op_StoreC:
|
|
case Op_StoreCM:
|
|
case Op_StoreD:
|
|
case Op_StoreF:
|
|
case Op_StoreI:
|
|
case Op_StoreL:
|
|
case Op_StoreP:
|
|
case Op_StoreN:
|
|
case Op_StoreVector:
|
|
case Op_StoreVectorScatter:
|
|
case Op_StoreNKlass:
|
|
for (uint k = 1; k < m->req(); k++) {
|
|
Node *in = m->in(k);
|
|
if (in == src_n) {
|
|
src_matches = true;
|
|
break;
|
|
}
|
|
}
|
|
break;
|
|
|
|
default:
|
|
src_matches = true;
|
|
break;
|
|
}
|
|
|
|
// If we have a store as our use, ignore the non source operands
|
|
if (src_matches == false) continue;
|
|
|
|
// Mark every unscheduled use which is not n with a recalculation
|
|
if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
|
|
if (finalize_mode && !m->is_Phi()) {
|
|
recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
|
|
}
|
|
lrg_ends = false;
|
|
}
|
|
}
|
|
}
|
|
// if none, this live range ends and we can adjust register pressure
|
|
if (lrg_ends) {
|
|
if (finalize_mode) {
|
|
_regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
|
|
} else {
|
|
_regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
|
|
}
|
|
}
|
|
}
|
|
|
|
// now add the register pressure from the dest and evaluate which heuristic we should use:
|
|
// 1.) The default, latency scheduling
|
|
// 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
|
|
uint dst = _regalloc->_lrg_map.find(n);
|
|
if (dst != 0) {
|
|
LRG& lrg_dst = _regalloc->lrgs(dst);
|
|
if (finalize_mode) {
|
|
_regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
|
|
// check to see if we fall over the register pressure cliff here
|
|
if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
|
|
_scheduling_for_pressure = true;
|
|
} else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
|
|
_scheduling_for_pressure = true;
|
|
} else {
|
|
// restore latency scheduling mode
|
|
_scheduling_for_pressure = false;
|
|
}
|
|
} else {
|
|
_regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
|
|
}
|
|
}
|
|
}
|
|
|
|
//------------------------------set_next_call----------------------------------
|
|
void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
|
|
if( next_call.test_set(n->_idx) ) return;
|
|
for( uint i=0; i<n->len(); i++ ) {
|
|
Node *m = n->in(i);
|
|
if( !m ) continue; // must see all nodes in block that precede call
|
|
if (get_block_for_node(m) == block) {
|
|
set_next_call(block, m, next_call);
|
|
}
|
|
}
|
|
}
|
|
|
|
//------------------------------needed_for_next_call---------------------------
|
|
// Set the flag 'next_call' for each Node that is needed for the next call to
|
|
// be scheduled. This flag lets me bias scheduling so Nodes needed for the
|
|
// next subroutine call get priority - basically it moves things NOT needed
|
|
// for the next call till after the call. This prevents me from trying to
|
|
// carry lots of stuff live across a call.
|
|
void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
|
|
// Find the next control-defining Node in this block
|
|
Node* call = NULL;
|
|
for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
|
|
Node* m = this_call->fast_out(i);
|
|
if (get_block_for_node(m) == block && // Local-block user
|
|
m != this_call && // Not self-start node
|
|
m->is_MachCall()) {
|
|
call = m;
|
|
break;
|
|
}
|
|
}
|
|
if (call == NULL) return; // No next call (e.g., block end is near)
|
|
// Set next-call for all inputs to this call
|
|
set_next_call(block, call, next_call);
|
|
}
|
|
|
|
//------------------------------add_call_kills-------------------------------------
|
|
// helper function that adds caller save registers to MachProjNode
|
|
static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
|
|
// Fill in the kill mask for the call
|
|
for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
|
|
if( !regs.Member(r) ) { // Not already defined by the call
|
|
// Save-on-call register?
|
|
if ((save_policy[r] == 'C') ||
|
|
(save_policy[r] == 'A') ||
|
|
((save_policy[r] == 'E') && exclude_soe)) {
|
|
proj->_rout.Insert(r);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
//------------------------------sched_call-------------------------------------
|
|
uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
|
|
RegMask regs;
|
|
|
|
// Schedule all the users of the call right now. All the users are
|
|
// projection Nodes, so they must be scheduled next to the call.
|
|
// Collect all the defined registers.
|
|
for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
|
|
Node* n = mcall->fast_out(i);
|
|
assert( n->is_MachProj(), "" );
|
|
int n_cnt = ready_cnt.at(n->_idx)-1;
|
|
ready_cnt.at_put(n->_idx, n_cnt);
|
|
assert( n_cnt == 0, "" );
|
|
// Schedule next to call
|
|
block->map_node(n, node_cnt++);
|
|
// Collect defined registers
|
|
regs.OR(n->out_RegMask());
|
|
// Check for scheduling the next control-definer
|
|
if( n->bottom_type() == Type::CONTROL )
|
|
// Warm up next pile of heuristic bits
|
|
needed_for_next_call(block, n, next_call);
|
|
|
|
// Children of projections are now all ready
|
|
for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
|
|
Node* m = n->fast_out(j); // Get user
|
|
if(get_block_for_node(m) != block) {
|
|
continue;
|
|
}
|
|
if( m->is_Phi() ) continue;
|
|
int m_cnt = ready_cnt.at(m->_idx) - 1;
|
|
ready_cnt.at_put(m->_idx, m_cnt);
|
|
if( m_cnt == 0 )
|
|
worklist.push(m);
|
|
}
|
|
|
|
}
|
|
|
|
// Act as if the call defines the Frame Pointer.
|
|
// Certainly the FP is alive and well after the call.
|
|
regs.Insert(_matcher.c_frame_pointer());
|
|
|
|
// Set all registers killed and not already defined by the call.
|
|
uint r_cnt = mcall->tf()->range()->cnt();
|
|
int op = mcall->ideal_Opcode();
|
|
MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
|
|
map_node_to_block(proj, block);
|
|
block->insert_node(proj, node_cnt++);
|
|
|
|
// Select the right register save policy.
|
|
const char *save_policy = NULL;
|
|
switch (op) {
|
|
case Op_CallRuntime:
|
|
case Op_CallLeaf:
|
|
case Op_CallLeafNoFP:
|
|
// Calling C code so use C calling convention
|
|
save_policy = _matcher._c_reg_save_policy;
|
|
break;
|
|
|
|
case Op_CallStaticJava:
|
|
case Op_CallDynamicJava:
|
|
// Calling Java code so use Java calling convention
|
|
save_policy = _matcher._register_save_policy;
|
|
break;
|
|
|
|
default:
|
|
ShouldNotReachHere();
|
|
}
|
|
|
|
// When using CallRuntime mark SOE registers as killed by the call
|
|
// so values that could show up in the RegisterMap aren't live in a
|
|
// callee saved register since the register wouldn't know where to
|
|
// find them. CallLeaf and CallLeafNoFP are ok because they can't
|
|
// have debug info on them. Strictly speaking this only needs to be
|
|
// done for oops since idealreg2debugmask takes care of debug info
|
|
// references but there no way to handle oops differently than other
|
|
// pointers as far as the kill mask goes.
|
|
bool exclude_soe = op == Op_CallRuntime;
|
|
|
|
// If the call is a MethodHandle invoke, we need to exclude the
|
|
// register which is used to save the SP value over MH invokes from
|
|
// the mask. Otherwise this register could be used for
|
|
// deoptimization information.
|
|
if (op == Op_CallStaticJava) {
|
|
MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
|
|
if (mcallstaticjava->_method_handle_invoke)
|
|
proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
|
|
}
|
|
|
|
add_call_kills(proj, regs, save_policy, exclude_soe);
|
|
|
|
return node_cnt;
|
|
}
|
|
|
|
|
|
//------------------------------schedule_local---------------------------------
|
|
// Topological sort within a block. Someday become a real scheduler.
|
|
bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
|
|
// Already "sorted" are the block start Node (as the first entry), and
|
|
// the block-ending Node and any trailing control projections. We leave
|
|
// these alone. PhiNodes and ParmNodes are made to follow the block start
|
|
// Node. Everything else gets topo-sorted.
|
|
|
|
#ifndef PRODUCT
|
|
if (trace_opto_pipelining()) {
|
|
tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
|
|
for (uint i = 0;i < block->number_of_nodes(); i++) {
|
|
tty->print("# ");
|
|
block->get_node(i)->fast_dump();
|
|
}
|
|
tty->print_cr("#");
|
|
}
|
|
#endif
|
|
|
|
// RootNode is already sorted
|
|
if (block->number_of_nodes() == 1) {
|
|
return true;
|
|
}
|
|
|
|
bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
|
|
|
|
// We track the uses of local definitions as input dependences so that
|
|
// we know when a given instruction is avialable to be scheduled.
|
|
uint i;
|
|
if (OptoRegScheduling && block_size_threshold_ok) {
|
|
for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
|
|
Node *n = block->get_node(i);
|
|
n->remove_flag(Node::Flag_is_scheduled);
|
|
if (!n->is_Phi()) {
|
|
recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
|
|
}
|
|
}
|
|
}
|
|
|
|
// Move PhiNodes and ParmNodes from 1 to cnt up to the start
|
|
uint node_cnt = block->end_idx();
|
|
uint phi_cnt = 1;
|
|
for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
|
|
Node *n = block->get_node(i);
|
|
if( n->is_Phi() || // Found a PhiNode or ParmNode
|
|
(n->is_Proj() && n->in(0) == block->head()) ) {
|
|
// Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
|
|
block->map_node(block->get_node(phi_cnt), i);
|
|
block->map_node(n, phi_cnt++); // swap Phi/Parm up front
|
|
if (OptoRegScheduling && block_size_threshold_ok) {
|
|
// mark n as scheduled
|
|
n->add_flag(Node::Flag_is_scheduled);
|
|
}
|
|
} else { // All others
|
|
// Count block-local inputs to 'n'
|
|
uint cnt = n->len(); // Input count
|
|
uint local = 0;
|
|
for( uint j=0; j<cnt; j++ ) {
|
|
Node *m = n->in(j);
|
|
if( m && get_block_for_node(m) == block && !m->is_top() )
|
|
local++; // One more block-local input
|
|
}
|
|
ready_cnt.at_put(n->_idx, local); // Count em up
|
|
|
|
#ifdef ASSERT
|
|
if (UseG1GC) {
|
|
if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
|
|
// Check the precedence edges
|
|
for (uint prec = n->req(); prec < n->len(); prec++) {
|
|
Node* oop_store = n->in(prec);
|
|
if (oop_store != NULL) {
|
|
assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
|
|
}
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
// A few node types require changing a required edge to a precedence edge
|
|
// before allocation.
|
|
if( n->is_Mach() && n->req() > TypeFunc::Parms &&
|
|
(n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
|
|
n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
|
|
// MemBarAcquire could be created without Precedent edge.
|
|
// del_req() replaces the specified edge with the last input edge
|
|
// and then removes the last edge. If the specified edge > number of
|
|
// edges the last edge will be moved outside of the input edges array
|
|
// and the edge will be lost. This is why this code should be
|
|
// executed only when Precedent (== TypeFunc::Parms) edge is present.
|
|
Node *x = n->in(TypeFunc::Parms);
|
|
if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
|
|
// Old edge to node within same block will get removed, but no precedence
|
|
// edge will get added because it already exists. Update ready count.
|
|
int cnt = ready_cnt.at(n->_idx);
|
|
assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
|
|
ready_cnt.at_put(n->_idx, cnt-1);
|
|
}
|
|
n->del_req(TypeFunc::Parms);
|
|
n->add_prec(x);
|
|
}
|
|
}
|
|
}
|
|
for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
|
|
ready_cnt.at_put(block->get_node(i2)->_idx, 0);
|
|
|
|
// All the prescheduled guys do not hold back internal nodes
|
|
uint i3;
|
|
for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled
|
|
Node *n = block->get_node(i3); // Get pre-scheduled
|
|
for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
|
|
Node* m = n->fast_out(j);
|
|
if (get_block_for_node(m) == block) { // Local-block user
|
|
int m_cnt = ready_cnt.at(m->_idx)-1;
|
|
if (OptoRegScheduling && block_size_threshold_ok) {
|
|
// mark m as scheduled
|
|
if (m_cnt < 0) {
|
|
m->add_flag(Node::Flag_is_scheduled);
|
|
}
|
|
}
|
|
ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count
|
|
}
|
|
}
|
|
}
|
|
|
|
Node_List delay;
|
|
// Make a worklist
|
|
Node_List worklist;
|
|
for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
|
|
Node *m = block->get_node(i4);
|
|
if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
|
|
if (m->is_iteratively_computed()) {
|
|
// Push induction variable increments last to allow other uses
|
|
// of the phi to be scheduled first. The select() method breaks
|
|
// ties in scheduling by worklist order.
|
|
delay.push(m);
|
|
} else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
|
|
// Force the CreateEx to the top of the list so it's processed
|
|
// first and ends up at the start of the block.
|
|
worklist.insert(0, m);
|
|
} else {
|
|
worklist.push(m); // Then on to worklist!
|
|
}
|
|
}
|
|
}
|
|
while (delay.size()) {
|
|
Node* d = delay.pop();
|
|
worklist.push(d);
|
|
}
|
|
|
|
if (OptoRegScheduling && block_size_threshold_ok) {
|
|
// To stage register pressure calculations we need to examine the live set variables
|
|
// breaking them up by register class to compartmentalize the calculations.
|
|
uint float_pressure = Matcher::float_pressure(FLOATPRESSURE);
|
|
_regalloc->_sched_int_pressure.init(INTPRESSURE);
|
|
_regalloc->_sched_float_pressure.init(float_pressure);
|
|
_regalloc->_scratch_int_pressure.init(INTPRESSURE);
|
|
_regalloc->_scratch_float_pressure.init(float_pressure);
|
|
|
|
_regalloc->compute_entry_block_pressure(block);
|
|
}
|
|
|
|
// Warm up the 'next_call' heuristic bits
|
|
needed_for_next_call(block, block->head(), next_call);
|
|
|
|
#ifndef PRODUCT
|
|
if (trace_opto_pipelining()) {
|
|
for (uint j=0; j< block->number_of_nodes(); j++) {
|
|
Node *n = block->get_node(j);
|
|
int idx = n->_idx;
|
|
tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
|
|
tty->print("latency:%3d ", get_latency_for_node(n));
|
|
tty->print("%4d: %s\n", idx, n->Name());
|
|
}
|
|
}
|
|
#endif
|
|
|
|
uint max_idx = (uint)ready_cnt.length();
|
|
// Pull from worklist and schedule
|
|
while( worklist.size() ) { // Worklist is not ready
|
|
|
|
#ifndef PRODUCT
|
|
if (trace_opto_pipelining()) {
|
|
tty->print("# ready list:");
|
|
for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
|
|
Node *n = worklist[i]; // Get Node on worklist
|
|
tty->print(" %d", n->_idx);
|
|
}
|
|
tty->cr();
|
|
}
|
|
#endif
|
|
|
|
// Select and pop a ready guy from worklist
|
|
Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
|
|
block->map_node(n, phi_cnt++); // Schedule him next
|
|
|
|
if (OptoRegScheduling && block_size_threshold_ok) {
|
|
n->add_flag(Node::Flag_is_scheduled);
|
|
|
|
// Now adjust the resister pressure with the node we selected
|
|
if (!n->is_Phi()) {
|
|
adjust_register_pressure(n, block, recalc_pressure_nodes, true);
|
|
}
|
|
}
|
|
|
|
#ifndef PRODUCT
|
|
if (trace_opto_pipelining()) {
|
|
tty->print("# select %d: %s", n->_idx, n->Name());
|
|
tty->print(", latency:%d", get_latency_for_node(n));
|
|
n->dump();
|
|
if (Verbose) {
|
|
tty->print("# ready list:");
|
|
for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
|
|
Node *n = worklist[i]; // Get Node on worklist
|
|
tty->print(" %d", n->_idx);
|
|
}
|
|
tty->cr();
|
|
}
|
|
}
|
|
|
|
#endif
|
|
if( n->is_MachCall() ) {
|
|
MachCallNode *mcall = n->as_MachCall();
|
|
phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
|
|
continue;
|
|
}
|
|
|
|
if (n->is_Mach() && n->as_Mach()->has_call()) {
|
|
RegMask regs;
|
|
regs.Insert(_matcher.c_frame_pointer());
|
|
regs.OR(n->out_RegMask());
|
|
|
|
MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
|
|
map_node_to_block(proj, block);
|
|
block->insert_node(proj, phi_cnt++);
|
|
|
|
add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
|
|
}
|
|
|
|
// Children are now all ready
|
|
for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
|
|
Node* m = n->fast_out(i5); // Get user
|
|
if (get_block_for_node(m) != block) {
|
|
continue;
|
|
}
|
|
if( m->is_Phi() ) continue;
|
|
if (m->_idx >= max_idx) { // new node, skip it
|
|
assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
|
|
continue;
|
|
}
|
|
int m_cnt = ready_cnt.at(m->_idx) - 1;
|
|
ready_cnt.at_put(m->_idx, m_cnt);
|
|
if( m_cnt == 0 )
|
|
worklist.push(m);
|
|
}
|
|
}
|
|
|
|
if( phi_cnt != block->end_idx() ) {
|
|
// did not schedule all. Retry, Bailout, or Die
|
|
if (C->subsume_loads() == true && !C->failing()) {
|
|
// Retry with subsume_loads == false
|
|
// If this is the first failure, the sentinel string will "stick"
|
|
// to the Compile object, and the C2Compiler will see it and retry.
|
|
C->record_failure(C2Compiler::retry_no_subsuming_loads());
|
|
} else {
|
|
assert(false, "graph should be schedulable");
|
|
}
|
|
// assert( phi_cnt == end_idx(), "did not schedule all" );
|
|
return false;
|
|
}
|
|
|
|
if (OptoRegScheduling && block_size_threshold_ok) {
|
|
_regalloc->compute_exit_block_pressure(block);
|
|
block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
|
|
block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
|
|
}
|
|
|
|
#ifndef PRODUCT
|
|
if (trace_opto_pipelining()) {
|
|
tty->print_cr("#");
|
|
tty->print_cr("# after schedule_local");
|
|
for (uint i = 0;i < block->number_of_nodes();i++) {
|
|
tty->print("# ");
|
|
block->get_node(i)->fast_dump();
|
|
}
|
|
tty->print_cr("# ");
|
|
|
|
if (OptoRegScheduling && block_size_threshold_ok) {
|
|
tty->print_cr("# pressure info : %d", block->_pre_order);
|
|
_regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
|
|
_regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
|
|
}
|
|
tty->cr();
|
|
}
|
|
#endif
|
|
|
|
return true;
|
|
}
|
|
|
|
//--------------------------catch_cleanup_fix_all_inputs-----------------------
|
|
static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
|
|
for (uint l = 0; l < use->len(); l++) {
|
|
if (use->in(l) == old_def) {
|
|
if (l < use->req()) {
|
|
use->set_req(l, new_def);
|
|
} else {
|
|
use->rm_prec(l);
|
|
use->add_prec(new_def);
|
|
l--;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
//------------------------------catch_cleanup_find_cloned_def------------------
|
|
Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
|
|
assert( use_blk != def_blk, "Inter-block cleanup only");
|
|
|
|
// The use is some block below the Catch. Find and return the clone of the def
|
|
// that dominates the use. If there is no clone in a dominating block, then
|
|
// create a phi for the def in a dominating block.
|
|
|
|
// Find which successor block dominates this use. The successor
|
|
// blocks must all be single-entry (from the Catch only; I will have
|
|
// split blocks to make this so), hence they all dominate.
|
|
while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
|
|
use_blk = use_blk->_idom;
|
|
|
|
// Find the successor
|
|
Node *fixup = NULL;
|
|
|
|
uint j;
|
|
for( j = 0; j < def_blk->_num_succs; j++ )
|
|
if( use_blk == def_blk->_succs[j] )
|
|
break;
|
|
|
|
if( j == def_blk->_num_succs ) {
|
|
// Block at same level in dom-tree is not a successor. It needs a
|
|
// PhiNode, the PhiNode uses from the def and IT's uses need fixup.
|
|
Node_Array inputs = new Node_List();
|
|
for(uint k = 1; k < use_blk->num_preds(); k++) {
|
|
Block* block = get_block_for_node(use_blk->pred(k));
|
|
inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
|
|
}
|
|
|
|
// Check to see if the use_blk already has an identical phi inserted.
|
|
// If it exists, it will be at the first position since all uses of a
|
|
// def are processed together.
|
|
Node *phi = use_blk->get_node(1);
|
|
if( phi->is_Phi() ) {
|
|
fixup = phi;
|
|
for (uint k = 1; k < use_blk->num_preds(); k++) {
|
|
if (phi->in(k) != inputs[k]) {
|
|
// Not a match
|
|
fixup = NULL;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
// If an existing PhiNode was not found, make a new one.
|
|
if (fixup == NULL) {
|
|
Node *new_phi = PhiNode::make(use_blk->head(), def);
|
|
use_blk->insert_node(new_phi, 1);
|
|
map_node_to_block(new_phi, use_blk);
|
|
for (uint k = 1; k < use_blk->num_preds(); k++) {
|
|
new_phi->set_req(k, inputs[k]);
|
|
}
|
|
fixup = new_phi;
|
|
}
|
|
|
|
} else {
|
|
// Found the use just below the Catch. Make it use the clone.
|
|
fixup = use_blk->get_node(n_clone_idx);
|
|
}
|
|
|
|
return fixup;
|
|
}
|
|
|
|
//--------------------------catch_cleanup_intra_block--------------------------
|
|
// Fix all input edges in use that reference "def". The use is in the same
|
|
// block as the def and both have been cloned in each successor block.
|
|
static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
|
|
|
|
// Both the use and def have been cloned. For each successor block,
|
|
// get the clone of the use, and make its input the clone of the def
|
|
// found in that block.
|
|
|
|
uint use_idx = blk->find_node(use);
|
|
uint offset_idx = use_idx - beg;
|
|
for( uint k = 0; k < blk->_num_succs; k++ ) {
|
|
// Get clone in each successor block
|
|
Block *sb = blk->_succs[k];
|
|
Node *clone = sb->get_node(offset_idx+1);
|
|
assert( clone->Opcode() == use->Opcode(), "" );
|
|
|
|
// Make use-clone reference the def-clone
|
|
catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
|
|
}
|
|
}
|
|
|
|
//------------------------------catch_cleanup_inter_block---------------------
|
|
// Fix all input edges in use that reference "def". The use is in a different
|
|
// block than the def.
|
|
void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
|
|
if( !use_blk ) return; // Can happen if the use is a precedence edge
|
|
|
|
Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
|
|
catch_cleanup_fix_all_inputs(use, def, new_def);
|
|
}
|
|
|
|
//------------------------------call_catch_cleanup-----------------------------
|
|
// If we inserted any instructions between a Call and his CatchNode,
|
|
// clone the instructions on all paths below the Catch.
|
|
void PhaseCFG::call_catch_cleanup(Block* block) {
|
|
|
|
// End of region to clone
|
|
uint end = block->end_idx();
|
|
if( !block->get_node(end)->is_Catch() ) return;
|
|
// Start of region to clone
|
|
uint beg = end;
|
|
while(!block->get_node(beg-1)->is_MachProj() ||
|
|
!block->get_node(beg-1)->in(0)->is_MachCall() ) {
|
|
beg--;
|
|
assert(beg > 0,"Catch cleanup walking beyond block boundary");
|
|
}
|
|
// Range of inserted instructions is [beg, end)
|
|
if( beg == end ) return;
|
|
|
|
// Clone along all Catch output paths. Clone area between the 'beg' and
|
|
// 'end' indices.
|
|
for( uint i = 0; i < block->_num_succs; i++ ) {
|
|
Block *sb = block->_succs[i];
|
|
// Clone the entire area; ignoring the edge fixup for now.
|
|
for( uint j = end; j > beg; j-- ) {
|
|
Node *clone = block->get_node(j-1)->clone();
|
|
sb->insert_node(clone, 1);
|
|
map_node_to_block(clone, sb);
|
|
if (clone->needs_anti_dependence_check()) {
|
|
insert_anti_dependences(sb, clone);
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
// Fixup edges. Check the def-use info per cloned Node
|
|
for(uint i2 = beg; i2 < end; i2++ ) {
|
|
uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
|
|
Node *n = block->get_node(i2); // Node that got cloned
|
|
// Need DU safe iterator because of edge manipulation in calls.
|
|
Unique_Node_List* out = new Unique_Node_List();
|
|
for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
|
|
out->push(n->fast_out(j1));
|
|
}
|
|
uint max = out->size();
|
|
for (uint j = 0; j < max; j++) {// For all users
|
|
Node *use = out->pop();
|
|
Block *buse = get_block_for_node(use);
|
|
if( use->is_Phi() ) {
|
|
for( uint k = 1; k < use->req(); k++ )
|
|
if( use->in(k) == n ) {
|
|
Block* b = get_block_for_node(buse->pred(k));
|
|
Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
|
|
use->set_req(k, fixup);
|
|
}
|
|
} else {
|
|
if (block == buse) {
|
|
catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
|
|
} else {
|
|
catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
|
|
}
|
|
}
|
|
} // End for all users
|
|
|
|
} // End of for all Nodes in cloned area
|
|
|
|
// Remove the now-dead cloned ops
|
|
for(uint i3 = beg; i3 < end; i3++ ) {
|
|
block->get_node(beg)->disconnect_inputs(C);
|
|
block->remove_node(beg);
|
|
}
|
|
|
|
// If the successor blocks have a CreateEx node, move it back to the top
|
|
for(uint i4 = 0; i4 < block->_num_succs; i4++ ) {
|
|
Block *sb = block->_succs[i4];
|
|
uint new_cnt = end - beg;
|
|
// Remove any newly created, but dead, nodes.
|
|
for( uint j = new_cnt; j > 0; j-- ) {
|
|
Node *n = sb->get_node(j);
|
|
if (n->outcnt() == 0 &&
|
|
(!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
|
|
n->disconnect_inputs(C);
|
|
sb->remove_node(j);
|
|
new_cnt--;
|
|
}
|
|
}
|
|
// If any newly created nodes remain, move the CreateEx node to the top
|
|
if (new_cnt > 0) {
|
|
Node *cex = sb->get_node(1+new_cnt);
|
|
if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
|
|
sb->remove_node(1+new_cnt);
|
|
sb->insert_node(cex, 1);
|
|
}
|
|
}
|
|
}
|
|
}
|