8006fe8f75
Replaced MakeDeps and the includeDB files with more standardized solutions. Reviewed-by: coleenp, kvn, kamg
554 lines
18 KiB
C++
554 lines
18 KiB
C++
/*
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* Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#ifndef SHARE_VM_ADLC_FORMSOPT_HPP
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#define SHARE_VM_ADLC_FORMSOPT_HPP
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// FORMSOPT.HPP - ADL Parser Target Specific Optimization Forms Classes
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// Class List
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class Form;
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class InstructForm;
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class OperandForm;
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class OpClassForm;
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class AttributeForm;
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class RegisterForm;
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class PipelineForm;
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class SourceForm;
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class EncodeForm;
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class Component;
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class Constraint;
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class Predicate;
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class MatchRule;
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class Attribute;
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class Effect;
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class ExpandRule;
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class RewriteRule;
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class ConstructRule;
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class FormatRule;
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class Peephole;
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class PeepMatch;
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class PeepConstraint;
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class EncClass;
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class Interface;
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class RegInterface;
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class ConstInterface;
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class MemInterface;
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class CondInterface;
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class Opcode;
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class InsEncode;
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class RegDef;
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class RegClass;
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class AllocClass;
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class ResourceForm;
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class PipeClassForm;
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class PipeClassOperandForm;
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class PipeClassResourceForm;
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class PeepMatch;
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class PeepConstraint;
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class PeepReplace;
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class MatchList;
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class ArchDesc;
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//==============================Register Allocation============================
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//------------------------------RegisterForm-----------------------------------
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class RegisterForm : public Form {
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private:
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AllocClass *_current_ac; // State used by iter_RegDefs()
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public:
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// Public Data
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NameList _rdefs; // List of register definition names
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Dict _regDef; // map register name to RegDef*
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NameList _rclasses; // List of register class names
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Dict _regClass; // map register class name to RegClass*
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NameList _aclasses; // List of allocation class names
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Dict _allocClass; // Dictionary of allocation classes
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static int _reg_ctr; // Register counter
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static int RegMask_Size(); // Compute RegMask size
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// Public Methods
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RegisterForm();
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~RegisterForm();
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void addRegDef(char *regName, char *callingConv, char *c_conv,
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char * idealtype, char *encoding, char* concreteName);
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RegClass *addRegClass(const char *className);
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AllocClass *addAllocClass(char *allocName);
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void addSpillRegClass();
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// Provide iteration over all register definitions
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// in the order used by the register allocator
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void reset_RegDefs();
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RegDef *iter_RegDefs();
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RegDef *getRegDef (const char *regName);
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RegClass *getRegClass(const char *className);
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// Return register mask, compressed chunk and register #
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uint reg_mask(char *register_class);
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// Check that register classes are compatible with chunks
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bool verify();
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void dump(); // Debug printer
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void output(FILE *fp); // Write info to output files
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};
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//------------------------------RegDef-----------------------------------------
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class RegDef : public Form {
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public:
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// Public Data
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const char *_regname; // ADLC (Opto) Register name
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const char *_callconv; // Calling convention
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const char *_c_conv; // Native calling convention, 'C'
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const char *_idealtype; // Ideal Type for register save/restore
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const char *_concrete; // concrete register name
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private:
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const char *_register_encode; // The register encoding
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// The chunk and register mask bits define info for register allocation
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uint32 _register_num; // Which register am I
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public:
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// Public Methods
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RegDef(char *regname, char *callconv, char *c_conv,
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char *idealtype, char *encoding, char *concrete);
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~RegDef(); // Destructor
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// Interface to define/redefine the register number
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void set_register_num(uint32 new_register_num);
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// Bit pattern used for generating machine code
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const char *register_encode() const;
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// Register number used in machine-independent code
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uint32 register_num() const;
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void dump(); // Debug printer
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void output(FILE *fp); // Write info to output files
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};
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//------------------------------RegClass---------------------------------------
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class RegClass : public Form {
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public:
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// Public Data
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const char *_classid; // Name of class
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NameList _regDefs; // List of registers in class
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Dict _regDef; // Dictionary of registers in class
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bool _stack_or_reg; // Allowed on any stack slot
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// Public Methods
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RegClass(const char *classid);// Constructor
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void addReg(RegDef *regDef); // Add a register to this class
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uint size() const; // Number of registers in class
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int regs_in_word( int wordnum, bool stack_also );
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const RegDef *get_RegDef(const char *regDef_name) const;
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// Returns the lowest numbered register in the mask.
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const RegDef* find_first_elem();
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// Iteration support
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void reset(); // Reset the following two iterators
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RegDef *RegDef_iter(); // which move jointly,
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const char *rd_name_iter(); // invoking either advances both.
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void dump(); // Debug printer
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void output(FILE *fp); // Write info to output files
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};
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//------------------------------AllocClass-------------------------------------
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class AllocClass : public Form {
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private:
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public:
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// Public Data
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char *_classid; // Name of class
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NameList _regDefs; // List of registers in class
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Dict _regDef; // Dictionary of registers in class
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// Public Methods
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AllocClass(char *classid); // Constructor
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void addReg(RegDef *regDef); // Add a register to this class
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uint size() {return _regDef.Size();} // Number of registers in class
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void dump(); // Debug printer
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void output(FILE *fp); // Write info to output files
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};
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//==============================Frame Handling================================
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//------------------------------FrameForm-------------------------------------
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class FrameForm : public Form {
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private:
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public:
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// Public Data
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bool _direction; // Direction of stack growth
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char *_sync_stack_slots;
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char *_inline_cache_reg;
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char *_interpreter_method_oop_reg;
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char *_interpreter_frame_pointer_reg;
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char *_cisc_spilling_operand_name;
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char *_frame_pointer;
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char *_c_frame_pointer;
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char *_alignment;
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bool _return_addr_loc;
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bool _c_return_addr_loc;
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char *_return_addr;
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char *_c_return_addr;
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char *_in_preserve_slots;
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char *_varargs_C_out_slots_killed;
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char *_calling_convention;
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char *_c_calling_convention;
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char *_return_value;
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char *_c_return_value;
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// Public Methods
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FrameForm();
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~FrameForm();
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void dump(); // Debug printer
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void output(FILE *fp); // Write info to output files
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};
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//==============================Scheduling=====================================
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//------------------------------PipelineForm-----------------------------------
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class PipelineForm : public Form {
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private:
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public:
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// Public Data
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NameList _reslist; // List of pipeline resources
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FormDict _resdict; // Resource Name -> ResourceForm mapping
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int _rescount; // Number of resources (ignores OR cases)
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int _maxcycleused; // Largest cycle used relative to beginning of instruction
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NameList _stages; // List of pipeline stages on architecture
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int _stagecnt; // Number of stages listed
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NameList _classlist; // List of pipeline classes
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FormDict _classdict; // Class Name -> PipeClassForm mapping
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int _classcnt; // Number of classes
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NameList _noplist; // List of NOP instructions
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int _nopcnt; // Number of nop instructions
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bool _variableSizeInstrs; // Indicates if this architecture has variable sized instructions
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bool _branchHasDelaySlot; // Indicates that branches have delay slot instructions
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int _maxInstrsPerBundle; // Indicates the maximum number of instructions for ILP
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int _maxBundlesPerCycle; // Indicates the maximum number of bundles for ILP
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int _instrUnitSize; // The minimum instruction unit size, in bytes
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int _bundleUnitSize; // The bundle unit size, in bytes
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int _instrFetchUnitSize; // The size of the I-fetch unit, in bytes [must be power of 2]
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int _instrFetchUnits; // The number of I-fetch units processed per cycle
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// Public Methods
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PipelineForm();
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~PipelineForm();
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void dump(); // Debug printer
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void output(FILE *fp); // Write info to output files
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};
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//------------------------------ResourceForm-----------------------------------
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class ResourceForm : public Form {
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public:
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unsigned mask() const { return _resmask; };
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private:
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// Public Data
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unsigned _resmask; // Resource Mask (OR of resource specifier bits)
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public:
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// Virtual Methods
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virtual ResourceForm *is_resource() const;
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// Public Methods
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ResourceForm(unsigned resmask); // Constructor
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~ResourceForm(); // Destructor
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void dump(); // Debug printer
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void output(FILE *fp); // Write info to output files
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};
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//------------------------------PipeClassOperandForm-----------------------------
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class PipeClassOperandForm : public Form {
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private:
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public:
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// Public Data
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const char *_stage; // Name of Stage
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unsigned _iswrite; // Read or Write
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unsigned _more_instrs; // Additional Instructions
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// Public Methods
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PipeClassOperandForm(const char *stage, unsigned iswrite, unsigned more_instrs)
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: _stage(stage)
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, _iswrite(iswrite)
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, _more_instrs(more_instrs)
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{};
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~PipeClassOperandForm() {}; // Destructor
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bool isWrite() const { return _iswrite != 0; }
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void dump(); // Debug printer
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void output(FILE *fp); // Write info to output files
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};
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//------------------------------PipeClassResourceForm--------------------------
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class PipeClassResourceForm : public Form {
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private:
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public:
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// Public Data
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const char *_resource; // Resource
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const char *_stage; // Stage the resource is used in
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int _cycles; // Number of cycles the resource is used
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// Public Methods
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PipeClassResourceForm(const char *resource, const char *stage, int cycles)
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// Constructor
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: _resource(resource)
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, _stage(stage)
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, _cycles(cycles)
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{};
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~PipeClassResourceForm() {}; // Destructor
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void dump(); // Debug printer
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void output(FILE *fp); // Write info to output files
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};
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//------------------------------PipeClassForm----------------------------------
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class PipeClassForm : public Form {
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private:
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public:
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// Public Data
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const char *_ident; // Name of class
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int _num; // Used in name of MachNode subclass
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NameList _parameters; // Locally defined names
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FormDict _localNames; // Table of operands & their types
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FormDict _localUsage; // Table of operand usage
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FormList _resUsage; // List of resource usage
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NameList _instructs; // List of instructions and machine nodes that use this pipeline class
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bool _has_fixed_latency; // Always takes this number of cycles
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int _fixed_latency; // Always takes this number of cycles
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int _instruction_count; // Number of instructions in first bundle
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bool _has_multiple_bundles; // Indicates if 1 or multiple bundles
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bool _has_branch_delay_slot; // Has branch delay slot as last instruction
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bool _force_serialization; // This node serializes relative to surrounding nodes
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bool _may_have_no_code; // This node may generate no code based on register allocation
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// Virtual Methods
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virtual PipeClassForm *is_pipeclass() const;
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// Public Methods
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PipeClassForm(const char *id, int num);
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// Constructor
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~PipeClassForm(); // Destructor
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bool hasFixedLatency() { return _has_fixed_latency; }
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int fixedLatency() { return _fixed_latency; }
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void setFixedLatency(int fixed_latency) { _has_fixed_latency = 1; _fixed_latency = fixed_latency; }
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void setInstructionCount(int i) { _instruction_count = i; }
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void setMultipleBundles(bool b) { _has_multiple_bundles = b; }
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void setBranchDelay(bool s) { _has_branch_delay_slot = s; }
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void setForceSerialization(bool s) { _force_serialization = s; }
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void setMayHaveNoCode(bool s) { _may_have_no_code = s; }
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int InstructionCount() const { return _instruction_count; }
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bool hasMultipleBundles() const { return _has_multiple_bundles; }
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bool hasBranchDelay() const { return _has_branch_delay_slot; }
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bool forceSerialization() const { return _force_serialization; }
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bool mayHaveNoCode() const { return _may_have_no_code; }
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void dump(); // Debug printer
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void output(FILE *fp); // Write info to output files
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};
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//==============================Peephole Optimization==========================
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//------------------------------Peephole---------------------------------------
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class Peephole : public Form {
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private:
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static int _peephole_counter;// Incremented by each peephole rule parsed
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int _peephole_number;// Remember my order in architecture description
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PeepMatch *_match; // Instruction pattern to match
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PeepConstraint *_constraint; // List of additional constraints
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PeepReplace *_replace; // Instruction pattern to substitute in
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Peephole *_next;
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public:
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// Public Methods
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Peephole();
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~Peephole();
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// Append a peephole rule with the same root instruction
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void append_peephole(Peephole *next_peephole);
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// Store the components of this peephole rule
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void add_match(PeepMatch *only_one_match);
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void append_constraint(PeepConstraint *next_constraint);
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void add_replace(PeepReplace *only_one_replacement);
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// Access the components of this peephole rule
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int peephole_number() { return _peephole_number; }
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PeepMatch *match() { return _match; }
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PeepConstraint *constraints() { return _constraint; }
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PeepReplace *replacement() { return _replace; }
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Peephole *next() { return _next; }
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void dump(); // Debug printer
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void output(FILE *fp); // Write info to output files
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};
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class PeepMatch : public Form {
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private:
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char *_rule;
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// NameList _depth; // Depth of this instruction
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NameList _parent;
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NameList _position;
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NameList _instrs; // List of instructions in match rule
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NameList _input; // input position in parent's instruction
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int _max_position;
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public:
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// Public Methods
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PeepMatch(char *rule);
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~PeepMatch();
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// Insert info into the match-rule
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void add_instruction(int parent, int position, const char *name, int input);
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// Access info about instructions in the peep-match rule
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int max_position();
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const char *instruction_name(int position);
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// Iterate through all info on matched instructions
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void reset();
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void next_instruction(int &parent, int &position, const char* &name, int &input);
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// 'true' if current position in iteration is a placeholder, not matched.
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bool is_placeholder();
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void dump();
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void output(FILE *fp);
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};
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class PeepConstraint : public Form {
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private:
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PeepConstraint *_next; // Additional constraints ANDed together
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public:
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const int _left_inst;
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const char* _left_op;
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const char* _relation;
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const int _right_inst;
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const char* _right_op;
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public:
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// Public Methods
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PeepConstraint(int left_inst, char* left_op, char* relation,
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int right_inst, char* right_op);
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~PeepConstraint();
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// Check if constraints use instruction at position
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bool constrains_instruction(int position);
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// Add another constraint
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void append(PeepConstraint *next_peep_constraint);
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// Access the next constraint in the list
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PeepConstraint *next();
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void dump();
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void output(FILE *fp);
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};
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class PeepReplace : public Form {
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private:
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char *_rule;
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NameList _instruction;
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NameList _operand_inst_num;
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NameList _operand_op_name;
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public:
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// Public Methods
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PeepReplace(char *rule);
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~PeepReplace();
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// Add contents of peepreplace
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void add_instruction(char *root);
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void add_operand( int inst_num, char *inst_operand );
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// Access contents of peepreplace
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void reset();
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void next_instruction(const char * &root);
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void next_operand(int &inst_num, const char * &inst_operand );
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// Utilities
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void dump();
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void output(FILE *fp);
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};
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class PeepChild : public Form {
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public:
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const int _inst_num; // Number of instruction (-1 if only named)
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const char *_inst_op; // Instruction's operand, NULL if number == -1
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const char *_inst_name; // Name of the instruction
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public:
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PeepChild(char *inst_name)
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: _inst_num(-1), _inst_op(NULL), _inst_name(inst_name) {};
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PeepChild(int inst_num, char *inst_op, char *inst_name)
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: _inst_num(inst_num), _inst_op(inst_op), _inst_name(inst_name) {};
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~PeepChild();
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bool use_leaf_operand() { return _inst_num != -1; };
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bool generate_an_instruction() { return _inst_num == -1; }
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void dump();
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void output(FILE *fp);
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};
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#endif // SHARE_VM_ADLC_FORMSOPT_HPP
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