68 lines
2.5 KiB
C++
68 lines
2.5 KiB
C++
/*
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* Copyright 2000-2005 Sun Microsystems, Inc. All Rights Reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
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* CA 95054 USA or visit www.sun.com if you need additional information or
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* have any questions.
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*
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*/
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// native word offsets from memory address (big endian)
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enum {
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pd_lo_word_offset_in_bytes = BytesPerInt,
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pd_hi_word_offset_in_bytes = 0
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};
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// explicit rounding operations are not required to implement the strictFP mode
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enum {
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pd_strict_fp_requires_explicit_rounding = false
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};
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// registers
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enum {
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pd_nof_cpu_regs_frame_map = 32, // number of registers used during code emission
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pd_nof_caller_save_cpu_regs_frame_map = 6, // number of cpu registers killed by calls
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pd_nof_cpu_regs_reg_alloc = 20, // number of registers that are visible to register allocator
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pd_nof_cpu_regs_linearscan = 32,// number of registers visible linear scan
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pd_first_cpu_reg = 0,
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pd_last_cpu_reg = 31,
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pd_last_allocatable_cpu_reg = 19,
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pd_first_callee_saved_reg = 0,
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pd_last_callee_saved_reg = 13,
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pd_nof_fpu_regs_frame_map = 32, // number of registers used during code emission
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pd_nof_caller_save_fpu_regs_frame_map = 32, // number of fpu registers killed by calls
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pd_nof_fpu_regs_reg_alloc = 32, // number of registers that are visible to register allocator
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pd_nof_fpu_regs_linearscan = 32, // number of registers visible to linear scan
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pd_first_fpu_reg = pd_nof_cpu_regs_frame_map,
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pd_last_fpu_reg = pd_nof_cpu_regs_frame_map + pd_nof_fpu_regs_frame_map - 1,
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pd_nof_xmm_regs_linearscan = 0,
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pd_nof_caller_save_xmm_regs = 0,
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pd_first_xmm_reg = -1,
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pd_last_xmm_reg = -1
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};
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// for debug info: a float value in a register is saved in single precision by runtime stubs
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enum {
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pd_float_saved_as_double = false
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};
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