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92 Commits

Author SHA1 Message Date
Jan Civlin
0485593fbc 8139340: SuperWord enhancement to support vector conditional move (CMovVD) on Intel AVX cpu 
Emit vector conditional moves

Reviewed-by: kvn
 2015-10-26 19:33:31 -07:00
Zoltan Majo
fab17a4e67 8137160: Use Compile::live_nodes instead of Compile::unique() in appropriate places -- followup 
Change two code locations to use live_nodes() instead of unique() for allocating memory. Adjust comments.

Reviewed-by: kvn
 2015-10-08 12:10:19 +02:00
Roland Westrelin
f8abd0e843 8136820: Generate better code for some Unsafe addressing patterns 
Reshape address computation to move invariant part out of loops

Reviewed-by: kvn
 2015-09-17 16:53:42 +02:00
Vlad Ureche
645a55a98f 8011858: Use Compile::live_nodes() instead of Compile::unique() in appropriate places 
Reviewed-by: kvn, vlivanov
 2015-08-10 10:39:19 -07:00
Roland Westrelin
a3c77df5f1 8077504: Unsafe load can loose control dependency and cause crash 
Node::depends_only_on_test() should return false for Unsafe loads

Reviewed-by: kvn, adinn
 2015-05-21 13:54:07 +02:00
Michael C Berg
4fca8dbb1f 8076276: Add support for AVX512 
Reviewed-by: kvn, roland
 2015-05-08 11:49:20 -07:00
Roland Westrelin
05ea4dbf1e 8069191: moving predicate out of loops may cause array accesses to bypass null check 
Remove CastPP nodes only during final graph reshape

Reviewed-by: kvn, jrose
 2015-03-24 10:25:09 +01:00
Jesper Wilhelmsson
d7f5fccbc6 Merge 2015-02-16 21:24:39 +01:00
Stefan Karlsson
4913ad5d7d 8072911: Remove includes of oop.inline.hpp from .hpp files 
Reviewed-by: brutisso, coleenp, jwilhelm, simonis, dholmes
 2015-02-13 14:37:35 +01:00
Paul Sandoz
c002e71565 8068977: Remove unused sun.misc.Unsafe prefetch intrinsic support 
Reviewed-by: kvn, vlivanov
 2015-02-10 21:32:05 +01:00
Tobias Hartmann
70a55eac34 8054033: Remove unused references to Compile* 
Removed unused references to Compile* missed by JDK-8034812.

Reviewed-by: kvn, roland
 2014-08-05 09:58:52 +02:00
Goetz Lindenmaier
25f33c005d 8049325: Introduce and clean up umbrella headers for the files in the cpu subdirectories 
Introduce and clean up umbrella headers for the files in the cpu subdirectories.

Reviewed-by: lfoltan, coleenp, dholmes
 2014-07-04 11:46:01 +02:00
Goetz Lindenmaier
8e7c8f1d88 8044775: Improve usage of umbrella header atomic.inline.hpp 
Reviewed-by: stefank, kvn
 2014-06-04 11:56:44 +02:00
Tobias Hartmann
2a0815a55e 8034812: remove IDX_INIT macro hack in Node class 
The IDX_INIT macro used by Node::Node(...) to retrieve the Compile object is removed and replaced by a call to Compile::current(). The Node constructor, new operator and all calls to it are adapted accordingly.

Reviewed-by: kvn, jrose, iveresov, goetz
 2014-06-02 08:07:29 +02:00
David Chase
305ec3bd3f 8037816: Fix for 8036122 breaks build with Xcode5/clang 
Repaired or selectively disabled offending formats; future-proofed with additional checking

Reviewed-by: kvn, jrose, stefank
 2014-05-09 16:50:54 -04:00
Morris Meyer
6db303a301 8001532: C2 node files refactoring 
Split C2 node files into cast, convert, countbits, intrinsic, move, narrowptr and opaquenode classes

Reviewed-by: kvn, morris
 2014-04-01 09:05:20 -07:00
Igor Veresov
768beb9a23 8031321: Support Intel bit manipulation instructions 
Add support for BMI1 instructions

Reviewed-by: kvn, roland
 2014-03-12 11:24:26 -07:00
Rickard Bäckman
0b85ee832e 8027754: Enable loop optimizations for loops with MathExact inside 
Reviewed-by: kvn, iveresov
 2014-01-23 12:08:28 +01:00
Goetz Lindenmaier
9c10079653 8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms 
Add ConstantTableBase node edge after parameters and before jvms. Adapt jvms offsets.

Reviewed-by: kvn
 2013-12-20 13:51:14 +01:00
Goetz Lindenmaier
ecca1bcc72 8029015: PPC64 (part 216): opto: trap based null and range checks 
On PPC64 use tdi instruction that does a compare and raises SIGTRAP for NULL and range checks.

Reviewed-by: kvn
 2013-11-27 16:16:21 -08:00
Goetz Lindenmaier
fe89766184 8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence 
Use new nodes for loadFence/storeFence intrinsics in C2.

Reviewed-by: kvn, dholmes
 2013-11-26 18:38:19 -08:00
Vladimir Kozlov
aabed3781b Merge 2013-11-21 12:30:35 -08:00
Goetz Lindenmaier
13b13f5259 8024921: PPC64 (part 113): Extend Load and Store nodes to know about memory ordering 
Add a field to C2 LoadNode and StoreNode classes which indicates whether the load/store should do an acquire/release on platforms which support it.

Reviewed-by: kvn
 2013-11-15 11:05:32 -08:00
Vladimir Kozlov
c632cad9d5 8024830: SEGV in org.apache.lucene.codecs.compressing.CompressingTermVectorsReader.get 
Exclude last input argument's stack slots from vector's spilling masks.

Reviewed-by: iveresov
 2013-11-11 11:53:33 -08:00
Vladimir Kozlov
39b0e57fdd Merge 2013-11-05 17:38:04 -08:00
Rickard Bäckman
441f1d74cf 8024924: Intrinsify java.lang.Math.addExact 
Reviewed-by: kvn, twisti
 2013-09-27 08:39:19 +02:00
Vladimir Kozlov
1a700c9216 Merge 2013-09-05 11:04:39 -07:00
Niclas Adlertz
a235ecb344 8023003: Cleanup the public interface to PhaseCFG 
Public methods that don't need to be public should be private.

Reviewed-by: kvn, twisti
 2013-08-16 10:23:55 +02:00
Vladimir Kozlov
f4c4fd7903 Merge 2013-08-01 17:25:10 -07:00
Vladimir Kozlov
1338c067aa 8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier() 
Generate one "fat" membar instead of set of barriers for volitile store

Reviewed-by: roland
 2013-07-12 14:03:10 -07:00
Vladimir Kozlov
7509ebea00 Merge 2013-06-27 13:04:51 -07:00
Vladimir Kozlov
b390a2d8e3 Merge 2013-06-21 15:56:24 -07:00
Goetz Lindenmaier
0522ce7a17 8016586: PPC64 (part 3): basic changes for PPC64 
Added #includes needed for ppc64 port. Renamed _MODEL_ppc to _MODEL_ppc_32 and renamed corresponding old _ppc files to _ppc_32.

Reviewed-by: dholmes, kvn
 2013-06-20 16:30:44 -07:00
Vladimir Kozlov
55f6f35697 Merge 2013-06-14 16:33:34 -07:00
David Chase
219121826e 8014959: assert(Compile::current()->live_nodes() < (uint)MaxNodeLimit) failed: Live Node limit exceeded limit 
Insert extra checks and bailouts for too many nodes

Reviewed-by: kvn
 2013-06-11 16:34:34 -04:00
Staffan Larsen
718f3252f6 8005849: JEP 167: Event-Based JVM Tracing 
Co-authored-by: Karen Kinnear <karen.kinnear@oracle.com>
Co-authored-by: Bengt Rutisson <bengt.rutisson@oracle.com>
Co-authored-by: Calvin Cheung <calvin.cheung@oracle.com>
Co-authored-by: Erik Gahlin <erik.gahlin@oracle.com>
Co-authored-by: Erik Helin <erik.helin@oracle.com>
Co-authored-by: Jesper Wilhelmsson <jesper.wilhelmsson@oracle.com>
Co-authored-by: Keith McGuigan <keith.mcguigan@oracle.com>
Co-authored-by: Mattias Tobiasson <mattias.tobiasson@oracle.com>
Co-authored-by: Markus Gronlund <markus.gronlund@oracle.com>
Co-authored-by: Mikael Auno <mikael.auno@oracle.com>
Co-authored-by: Nils Eliasson <nils.eliasson@oracle.com>
Co-authored-by: Nils Loodin <nils.loodin@oracle.com>
Co-authored-by: Rickard Backman <rickard.backman@oracle.com>
Co-authored-by: Stefan Karlsson <stefan.karlsson@oracle.com>
Co-authored-by: Yekaterina Kantserova <yekaterina.kantserova@oracle.com>
Reviewed-by: acorn, coleenp, sla
 2013-06-10 11:30:51 +02:00
Roland Westrelin
6ae26f2e94 8010460: Interpreter on some platforms loads ConstMethod::_max_stack and misses extra stack slots for JSR 292 
ConstMethod::max_stack() doesn't account for JSR 292 appendix.

Reviewed-by: kvn
 2013-04-24 11:49:38 +02:00
Vladimir Kozlov
9e0c61f822 6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86 
Use SSE4.2 and AVX2 instructions for encodeArray intrinsic.

Reviewed-by: roland
 2013-01-22 15:34:16 -08:00
Bharadwaj Yadavalli
2d2532e740 7092905: C2: Keep track of the number of dead nodes 
Keep an (almost) accurate running count of the reachable (live) flow graph nodes.

Reviewed-by: kvn, twisti, jrose, vlivanov
 2012-11-27 17:24:15 -08:00
Roland Westrelin
61eb5a0549 7054512: Compress class pointers after perm gen removal 
Support of compress class pointers in the compilers.

Reviewed-by: kvn, twisti
 2012-10-09 10:11:38 +02:00
Bharadwaj Yadavalli
d5d2e78faa 7193318: C2: remove number of inputs requirement from Node's new operator 
Deleted placement new operator of Node - node(size_t, Compile *, int).

Reviewed-by: kvn, twisti
 2012-09-27 09:38:42 -07:00
Roland Westrelin
302540691b 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() 
Use shorter instruction sequences for atomic add and atomic exchange when possible.

Reviewed-by: kvn, jrose
 2012-09-20 16:49:17 +02:00
Jon Masamitsu
5c58d27aac 6964458: Reimplement class meta-data storage to use native memory 
Remove PermGen, allocate meta-data in metaspace linked to class loaders, rewrite GC walking, rewrite and rename metadata to be C++ classes

Co-authored-by: Stefan Karlsson <stefan.karlsson@oracle.com>
Co-authored-by: Mikael Gerdin <mikael.gerdin@oracle.com>
Co-authored-by: Tom Rodriguez <tom.rodriguez@oracle.com>
Reviewed-by: jmasa, stefank, never, coleenp, kvn, brutisso, mgerdin, dholmes, jrose, twisti, roland
 2012-09-01 13:25:18 -04:00
Christian Thalinger
12901d0e5b 7023639: JSR 292 method handle invocation needs a fast path for compiled code 
6984705: JSR 292 method handle creation should not go through JNI

Remove assembly code for JDK 7 chained method handles

Co-authored-by: John Rose <john.r.rose@oracle.com>
Co-authored-by: Michael Haupt <michael.haupt@oracle.com>
Reviewed-by: jrose, twisti, kvn, mhaupt
 2012-07-24 10:51:00 -07:00
Vladimir Kozlov
d1191bb4f4 7119644: Increase superword's vector size up to 256 bits 
Increase vector size up to 256-bits for YMM AVX registers on x86.

Reviewed-by: never, twisti, roland
 2012-06-15 01:25:19 -07:00
Vladimir Kozlov
dc542c9909 7121648: Use 3-operands SIMD instructions on x86 with AVX 
Use 3-operands SIMD instructions in C2 generated code for machines with AVX.

Reviewed-by: never
 2011-12-20 00:55:02 -08:00
Vladimir Kozlov
09b7902e14 7107042: assert(no_dead_loop) failed: dead loop detected 
Use dead nodes elimination code in PhaseIdealLoop before executing EA.

Reviewed-by: never, twisti
 2011-11-09 07:25:51 -08:00
Roland Westrelin
48ecf5dfe4 7086394: c2/arm: enable UseFPUForSpilling 
ARM has instructions to move data directly between the fpu and integer registers.

Reviewed-by: kvn, never
 2011-09-07 09:35:52 +02:00
Tom Rodriguez
32fd1b087d 7071307: MethodHandle bimorphic inlining should consider the frequency 
Reviewed-by: twisti, roland, kvn, iveresov
 2011-09-02 20:58:21 -07:00
Vladimir Kozlov
90651b2666 7079329: Adjust allocation prefetching for T4 
On T4 2 BIS instructions should be issued to prefetch 64 bytes

Reviewed-by: iveresov, phh, twisti
 2011-08-16 16:59:46 -07:00