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974 Commits

Author SHA1 Message Date
Daniel D. Daugherty
5cf176b870 Merge 2015-05-16 13:19:11 -07:00
Alejandro Murillo
7857b953d0 Merge 2015-05-14 12:05:32 -07:00
Max Ockner
813f34059b 6811960: x86 biasedlocking epoch expired rare bug 
It is now guaranteed that biased_locking_enter will be passed a valid tmp_reg.

Reviewed-by: coleenp, dcubed, kvn
 2015-05-14 14:03:58 -04:00
Tobias Hartmann
9e5ef665a0 Merge 2015-05-14 16:16:06 +02:00
Ed Nevill
a65f9f9589 8079203: AARCH64: Need to cater for different partner implementations 
Parse /proc/cpuinfo to derive implementation specific info

Reviewed-by: kvn
 2015-05-12 13:58:42 +00:00
Michael C Berg
4fca8dbb1f 8076276: Add support for AVX512 
Reviewed-by: kvn, roland
 2015-05-08 11:49:20 -07:00
Harold Seigel
da4711381d Merge 2015-05-08 13:25:11 -04:00
Alejandro Murillo
58a1361125 Merge 2015-05-07 15:34:45 -07:00
Vladimir Kozlov
fcf64c698f Merge 2015-05-07 11:28:03 -07:00
Ed Nevill
69aa7ea566 8079507: aarch64: fails to build due to changes to template interpreter 
Fix by merging in changes from fix for 8074345

Reviewed-by: kvn
 2015-05-07 13:58:57 +00:00
Alejandro Murillo
d83bdb4157 Merge 2015-05-01 03:56:01 -07:00
Bharadwaj Yadavalli
f8d0a6ff28 Merge 2015-04-30 18:14:58 -04:00
Per Lidén
7e9f9f9107 8013171: G1: C1 x86_64 barriers use 32-bit accesses to 64-bit PtrQueue::_index 
Reviewed-by: roland, tschatzl
 2015-05-06 09:21:10 +02:00
Andrew Haley
a4c5e8666b 8078621: AARCH64: Fails to build without precompiled headers 
Fix #includes.

Reviewed-by: kvn
 2015-04-24 16:28:29 +01:00
Ed Nevill
650d8b7cb6 8075930: AARCH64: Use FP Register in C2 
Modify to allow C2 to allocate FP (R29) as a general register

Reviewed-by: aph, kvn, dlong
 2015-04-24 11:01:37 +00:00
Volker Simonis
c87659b9f2 8079280: Fix format warning/error in vm_version_ppc.cpp 
Reviewed-by: stefank
 2015-05-04 18:41:53 +02:00
Calvin Cheung
22611f6936 Merge 2015-04-23 14:09:59 -07:00
Andrew Dinn
294d9dce7f 8078263: AARCH64: Volatile fields should be accessed with ldar and stlr 
Ad file rules now generate load acquire and store release for volatile accesses

Reviewed-by: kvn
 2015-04-23 17:53:38 +01:00
Calvin Cheung
4c99a3031d Merge 2015-05-02 18:40:37 -07:00
Thomas Stuefe
e68705a3f8 8078628: linux-zero does not build without precompiled header 
Add missing includes

Reviewed-by: coleenp, stefank, sgehwolf
 2015-04-30 09:09:01 +02:00
Severin Gehwolf
f381346db0 8078504: Zero fails to build 
Reviewed-by: kvn, simonis
 2015-04-23 17:42:06 +02:00
Zoltan Majo
4a038936e3 Merge 2015-04-27 11:01:29 +02:00
Zoltan Majo
a452b030ce 8068945: Use RBP register as proper frame pointer in JIT compiled code on x86 
Introduce the PreserveFramePointer flag to control if RBP is used as the frame pointer or as a general purpose register.

Reviewed-by: kvn, roland, dlong, enevill, shade
 2015-04-27 10:49:43 +02:00
Jesper Wilhelmsson
e8a6f321c1 Merge 2015-04-23 16:09:21 +02:00
Goetz Lindenmaier
879707ab31 8078482: ppc: pass thread to throw_AbstractMethodError 
Also improve check for Safepoints in signal handler.

Reviewed-by: kvn, simonis
 2015-04-23 09:27:02 +02:00
Jesper Wilhelmsson
f2ac065c42 Merge 2015-04-20 14:26:54 +02:00
Calvin Cheung
7bb3af5d16 Merge 2015-04-17 14:37:20 -07:00
Vladimir Kozlov
b9c00b1904 Merge 2015-04-16 14:05:48 -07:00
Daniel D. Daugherty
884f0d320f 8073165: Contended Locking fast exit bucket 
JEP-143/JDK-8073165 Contended Locking fast exit bucket

Co-authored-by: Dave Dice <dave.dice@oracle.com>
Co-authored-by: Karen Kinnear <karen.kinnear@oracle.com>
Reviewed-by: dholmes, acorn, dice, dcubed
 2015-04-16 08:23:26 -07:00
Bengt Rutisson
fdcc47e443 8077873: G1: Remove G1SATBPrintStubs 
Reviewed-by: kbarrett, tschatzl
 2015-04-16 09:13:14 +02:00
Goetz Lindenmaier
5827e6ce0f 8077838: Recent developments for ppc 
Power 8 recognition and instructions, math.*Exact intrinsics and rtm, C2 optimizations

Reviewed-by: kvn, simonis
 2015-04-15 12:44:56 +02:00
Andrew Haley
d81e78e8bc 8077615: AARCH64: Add C2 intrinsic for BigInteger::multiplyToLen() method 
Add C2 intrinsic for BigInteger::multiplyToLen() on AArch64.

Reviewed-by: kvn
 2015-04-14 11:43:18 +01:00
Goetz Lindenmaier
af1efee490 8077618: Move rtmLocking.cpp to shared directory 
Reviewed-by: dholmes, kvn
 2015-04-13 18:49:59 -07:00
Coleen Phillimore
ca12a72730 Merge 2015-04-03 13:18:06 +00:00
Thomas Stuefe
704c02a180 8074860: Structured Exception Catcher missing around CreateJavaVM on Windows 
Add __try/__except around JNI_CreateJavaVM

Reviewed-by: mgronlun, dcubed
 2015-04-03 05:55:33 -04:00
Coleen Phillimore
dccc407b83 8076421: Fix Zero Interpreter bugs in class redefinition and template interpreter changes 
Metadata_do walking interpreted frames was wrong and generate_Reference_get is not necessarily an accessor method.

Reviewed-by: sgehwolf, dholmes
 2015-04-02 14:02:54 -04:00
Coleen Phillimore
21305d00f5 Merge 2015-04-02 02:20:54 +00:00
Coleen Phillimore
f0035b701e 8076492: Make common code from template interpreter code 
Move case statement out of assembly code

Reviewed-by: minqi, sspitsyn, dholmes
 2015-04-01 22:03:17 -04:00
Max Ockner
eaf7ce63dd 8078349: remove dead code - fast_iagetfield 
Unused function fast_iagetfield has been removed.

Reviewed-by: hseigel, coleenp
 2015-04-01 15:13:48 -04:00
Thomas Stuefe
1afbc04d56 8076185: Provide SafeFetchX implementation for zero 
Implement SafeFetchX for zero using setjmp/longjmp and Posix TLS

Reviewed-by: sgehwolf, dholmes
 2015-03-31 05:30:36 -04:00
Max Ockner
f0fa5ca5f0 8074718: Merge templateTable_x86 _32 and _64 .hpp files 
TemplateTable_x86 32 and 64 bit files have been merged.

Reviewed-by: hseigel, coleenp
 2015-03-30 09:47:52 -04:00
Igor Veresov
1b5090da9e 8076968: PICL based initialization of L2 cache line size on some SPARC systems is incorrect 
Chcek both l2-dcache-line-size and l2-cache-line-size properties to determine the size of the line

Reviewed-by: kvn
 2015-04-06 20:20:17 -07:00
Volker Simonis
1bcb57c8de 8076532: Fix format warning/error in methodHandles_ppc.cpp 
Reviewed-by: dholmes
 2015-04-02 11:28:55 +02:00
Michael C Berg
9e55e44c85 8074981: Integer/FP scalar reduction optimization 
Add scalar reduction optimization to C2 to take advantage of vector instructions in modern x86 CPUs.

Reviewed-by: kvn, twisti
 2015-04-01 18:07:50 -07:00
Andrew Haley
1dfbc44c1f 8026049: (bf) Intrinsify ByteBuffer.put{Int, Double, Float, ...} methods 
Use unaligned Unsafe loads and stores for ByteBuffer access on platforms which support unaligned access. Add intrinsics for Unsafe.{get,put}-X-Unaligned methods.

Reviewed-by: dholmes, jrose, psandoz, kvn
 2015-03-31 12:31:18 -07:00
Sandhya Viswanathan
51fd716978 8078113: 8011102 changes may cause incorrect results 
Replace Vzeroupper instruction in stubs with zeroing only used ymm registers.

Reviewed-by: kvn
 2015-04-17 17:39:19 -07:00
Zoltan Majo
90e9ec4634 Merge 2015-03-27 09:02:53 +01:00
Alejandro Murillo
4811592f50 Merge 2015-03-26 13:54:11 -07:00
Jesper Wilhelmsson
5f5b27baba Merge 2015-03-23 22:08:14 +01:00
Alejandro Murillo
7ce244a2eb Merge 2015-03-23 11:44:41 -07:00