62 Commits

Author SHA1 Message Date
Vladimir Kozlov
669fa7396d 7097546: Optimize use of CMOVE instructions
Avoid CMove in a loop if possible. May generate CMove if it could be moved outside a loop.

Reviewed-by: never
2011-10-26 06:08:56 -07:00
Vladimir Kozlov
2407655ab1 7100757: The BitSet.nextSetBit() produces incorrect result in 32bit VM on Sparc
Instruction countTrailingZerosL() should use iRegIsafe dst register since it is used in long arithmetic.

Reviewed-by: never, twisti
2011-10-14 10:07:28 -07:00
Vladimir Kozlov
9c87ea9062 7085137: -XX:+VerifyOops is broken
Replace set() with patchable_set() to generate 8 instructions always.

Reviewed-by: iveresov, never, roland
2011-08-31 09:48:21 -07:00
Vladimir Kozlov
6446205688 7059037: Use BIS for zeroing on T4
Use BIS for zeroing new allocated big (2Kb and more) objects and arrays.

Reviewed-by: never, twisti, ysr
2011-08-26 08:52:22 -07:00
Christian Thalinger
db338313bf 7079769: JSR 292: incorrect size() for CallStaticJavaHandle on sparc
Reviewed-by: never, kvn
2011-08-17 11:52:22 -07:00
Vladimir Kozlov
90651b2666 7079329: Adjust allocation prefetching for T4
On T4 2 BIS instructions should be issued to prefetch 64 bytes

Reviewed-by: iveresov, phh, twisti
2011-08-16 16:59:46 -07:00
Vladimir Kozlov
ac99f413d7 7063629: use cbcond in C2 generated code on T4
Use new short branch instruction in C2 generated code.

Reviewed-by: never
2011-08-11 12:08:11 -07:00
Roland Westrelin
b543a07b9a 7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
Replace MemBarAcquire/MemBarRelease nodes on the monitor enter/exit code paths with new MemBarAcquireLock/MemBarReleaseLock nodes

Reviewed-by: kvn, twisti
2011-08-02 18:36:40 +02:00
Vladimir Kozlov
18329266ea 7069452: Cleanup NodeFlags
Remove flags which duplicate information in Node::NodeClasses.

Reviewed-by: never
2011-07-27 17:28:36 -07:00
Vladimir Kozlov
48c1293916 7063628: Use cbcond on T4
Add new short branch instruction to Hotspot sparc assembler.

Reviewed-by: never, twisti, jrose
2011-07-21 11:25:07 -07:00
Vladimir Kozlov
20a26c54cd 7059034: Use movxtod/movdtox on T4
Use new VIS3 mov instructions on T4 for move data between general and float registers.

Reviewed-by: never, twisti
2011-07-08 09:38:48 -07:00
Roland Westrelin
4171ca786e 7029017: Additional architecture support for c2 compiler
Enables cross building of a c2 VM. Support masking of shift counts when the processor architecture mandates it.

Reviewed-by: kvn, never
2011-03-25 09:35:39 +01:00
Vladimir Kozlov
5d3ab72d1d 7017746: Regression : C2 compiler crash due to SIGSEGV in PhaseCFG::schedule_early()
Add TEMP edges (and KILL projections) before duplicated operands are removed in Expand() methods.

Reviewed-by: never
2011-02-10 14:25:59 -08:00
Igor Veresov
18619a6ed6 7011627: C1: call_RT must support targets that don't fit in wdisp30
Make both compilers emit near and far calls when necessary.

Reviewed-by: never, kvn, phh
2011-01-12 18:33:25 -08:00
Vladimir Kozlov
9fd396ce55 7006505: Use kstat info to identify SPARC processor
Read Solaris kstat data to get more precise CPU information

Reviewed-by: iveresov, never, twisti, dholmes
2010-12-16 14:15:12 -08:00
Christian Thalinger
0563626b3c 7006044: materialize cheap non-oop pointers on 64-bit SPARC
After 6961690 we load non-oop pointers for the constant table which could easily be materialized in a few instructions.

Reviewed-by: never, kvn
2010-12-14 12:44:30 -08:00
Vladimir Kozlov
797fb02b41 7004925: CTW: assert(nbits == 32 || -(1 << nbits-1) <= x && x < ( 1 << nbits-1)) failed: value out of range
Set offset in register if it does not fit 13 bits.

Reviewed-by: iveresov
2010-12-07 11:00:02 -08:00
Christian Thalinger
ffaadcecea 6961690: load oops from constant table on SPARC
Oops should be loaded from the constant table of an nmethod instead of materializing them with a long code sequence.

Reviewed-by: never, kvn
2010-12-03 01:34:31 -08:00
Christian Thalinger
a1396ef871 6996240: The BitSet.length method sometimes returns an index+1 value less than that of the highest bit set
Reviewed-by: never, kvn
2010-11-02 14:56:40 -07:00
Vladimir Kozlov
249b1f6c4f 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14
Use hardware DIV instruction for long division by constant when it is faster than code with multiply.

Reviewed-by: never
2010-11-02 09:00:37 -07:00
Christian Thalinger
a4b2fe3b1c 6978355: renaming for 6961697
This is the renaming part of 6961697 to keep the actual changes small for review.

Reviewed-by: kvn, never
2010-08-25 05:27:54 -07:00
John R Rose
d6a9b93b5a Merge 2010-06-02 22:45:42 -07:00
Vladimir Kozlov
a3005a16fc 6954029: Improve implicit null check generation with compressed oops
Hoist DecodeN instruction above null check

Reviewed-by: never, twisti
2010-06-02 09:49:32 -07:00
Erik Trimble
ba7c173659 6941466: Oracle rebranding changes for Hotspot repositories
Change all the Sun copyrights to Oracle copyright

Reviewed-by: ohair
2010-05-27 19:08:38 -07:00
Vladimir Kozlov
cc18a50e59 6916623: Align object to 16 bytes to use Compressed Oops with java heap up to 64Gb
Added new product ObjectAlignmentInBytes flag to control object alignment.

Reviewed-by: twisti, ysr, iveresov
2010-05-27 18:01:56 -07:00
Christian Thalinger
7a9f2e7625 6934104: JSR 292 needs to support SPARC C2
C2 for SPARC needs to support JSR 292.

Reviewed-by: kvn, never
2010-05-25 02:38:48 -07:00
Hiroshi Yamauchi
cd48f31efe 6946040: add intrinsic for short and char reverseBytes
Reviewed-by: never, twisti
2010-04-26 11:27:21 -07:00
Vladimir Kozlov
f6934fd3b7 6940726: Use BIS instruction for allocation prefetch on Sparc
Use BIS instruction for allocation prefetch on Sparc

Reviewed-by: twisti
2010-04-07 12:39:27 -07:00
Vladimir Kozlov
fa2d360cd5 6910664: C2: java/util/Arrays/Sorting.java fails with DeoptimizeALot flag
Matcher::float_in_double should be true only when FPU is used for floats.

Reviewed-by: never, twisti
2010-02-19 10:04:16 -08:00
Tom Rodriguez
96612c6e23 6909839: missing unsigned compare cases for some cmoves in sparc.ad
Reviewed-by: kvn, jrose
2010-01-09 00:59:35 -08:00
Christian Thalinger
375527d84e 6829187: compiler optimizations required for JSR 292
C2 implementation for invokedynamic support.

Reviewed-by: kvn, never
2010-01-05 13:05:58 +01:00
Christian Thalinger
ad6d07e80b 6893554: SPECjvm2008 mpegaudio fails with SecurityException
The problem occurs with negative numbers, as the 32-bit input values are sign extended into the 64-bit registers.

Reviewed-by: kvn
2009-10-27 03:00:27 -07:00
Vladimir Kozlov
34324e30c0 6890984: Comparison of 2 arrays could cause VM crash
Restore original null checks.

Reviewed-by: never, cfang
2009-10-14 15:03:32 -07:00
Volker Simonis
930f3d4570 6880034: SIGBUS during deoptimisation at a safepoint on 64bit-SPARC
Fix problem with the double register encodings in sparc.ad

Reviewed-by: never, jrose
2009-10-06 10:15:38 -07:00
Vladimir Kozlov
243514d483 6827605: new String intrinsics may prevent EA scalar replacement
6875866: Intrinsic for String.indexOf() is broken on x86 with SSE4.2

Modify String intrinsic methods to pass char[] pointers instead of string oops.

Reviewed-by: never
2009-09-14 12:14:20 -07:00
Christian Thalinger
6ef69eb7c3 6875967: CTW fails with./generated/adfiles/ad_sparc.cpp:6711
Reviewed-by: cfang, never
2009-08-31 02:24:21 -07:00
Christian Thalinger
a9ad90fa87 5057225: Remove useless I2L conversions
The optimizer should be told to normalize (AndL (ConvI2L x) 0xFF) to (ConvI2L (AndI x 0xFF)), and then the existing matcher rule will work for free.

Reviewed-by: kvn
2009-06-26 07:26:10 -07:00
Christian Thalinger
8a262ce04b 6814842: Load shortening optimizations
6797305 handles load widening but no shortening which should be covered here.

Reviewed-by: never, kvn
2009-05-13 00:45:22 -07:00
Christian Thalinger
6a270f9f19 6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
These methods can be instrinsified by using bit scan, bit test, and population count instructions.

Reviewed-by: kvn, never
2009-05-06 00:27:52 -07:00
Tom Rodriguez
60e1a19b44 6833573: C2 sparc: assert(c < 64 && (c & 1) == 0,"bad double float register")
Reviewed-by: twisti
2009-04-24 15:08:30 -07:00
Christian Thalinger
57d945fd3d 6822110: Add AddressLiteral class on SPARC
The Address class on SPARC currently handles both, addresses and address literals, what makes the Address class more complicated than it has to be.

Reviewed-by: never, kvn
2009-04-21 11:16:30 -07:00
Changpeng Fang
c0d62ad9e6 6761600: Use sse 4.2 in intrinsics
Use SSE 4.2 in intrinsics for String.{compareTo/equals/indexOf} and Arrays.equals.

Reviewed-by: kvn, never, jrose
2009-03-31 14:07:08 -07:00
Christian Thalinger
de67e52949 6378821: bitCount() should use POPC on SPARC processors and AMD+10h
BitCount() should use POPC on SPARC processors where POPC is implemented directly in hardware.

Reviewed-by: kvn, never
2009-03-13 11:35:17 -07:00
Vladimir Kozlov
69f9ddee90 6791178: Specialize for zero as the compressed oop vm heap base
Use zero based compressed oops if java heap is below 32gb and unscaled compressed oops if java heap is below 4gb.

Reviewed-by: never, twisti, jcoomes, coleenp
2009-03-12 10:37:46 -07:00
Christian Thalinger
89cea91c48 6797305: Add LoadUB and LoadUI opcode class
Add a LoadUB (unsigned byte) and LoadUI (unsigned int) opcode class so we have these load optimizations in the first place and do not need to handle them in the matcher.

Reviewed-by: never, kvn
2009-03-09 03:17:11 -07:00
Christian Thalinger
05d1de7727 6810672: Comment typos
I have collected some typos I have found while looking at the code.

Reviewed-by: kvn, never
2009-02-27 13:27:09 -08:00
Christian Thalinger
3b8452da93 6796746: rename LoadC (char) opcode class to LoadUS (unsigned short)
Renaming LoadC to LoadUS would round up the planned introduction of LoadUB and LoadUI.

Reviewed-by: phh, kvn
2009-01-26 16:22:12 +01:00
Vladimir Kozlov
1ff1bdc3e6 6790182: matcher.cpp:1375: assert(false,"bad AD file")
Add a match rule for regD_low in regD definition.

Reviewed-by: never
2009-01-07 11:23:28 -08:00
Vladimir Kozlov
7aae40a95f 6462850: generate biased locking code in C2 ideal graph
Inline biased locking code in C2 ideal graph during macro nodes expansion

Reviewed-by: never
2008-11-07 09:29:38 -08:00
Tom Rodriguez
429a95440a 6754519: don't emit flag fixup for NaN when condition being tested doesn't need it
Reviewed-by: kvn, rasbold
2008-10-28 09:31:30 -07:00