0b30e012ee
Everything except cpu/ and os_cpu/ Reviewed-by: dholmes, goetz, dlong, coleenp, kvn
300 lines
11 KiB
C++
300 lines
11 KiB
C++
/*
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* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#ifndef SHARE_VM_C1_C1_FRAMEMAP_HPP
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#define SHARE_VM_C1_C1_FRAMEMAP_HPP
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#include "asm/assembler.hpp"
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#include "c1/c1_Defs.hpp"
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#include "c1/c1_LIR.hpp"
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#include "code/vmreg.hpp"
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#include "memory/allocation.hpp"
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#include "runtime/frame.hpp"
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#include "runtime/synchronizer.hpp"
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#include "utilities/globalDefinitions.hpp"
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class ciMethod;
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class CallingConvention;
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class BasicTypeArray;
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class BasicTypeList;
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//--------------------------------------------------------
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// FrameMap
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//--------------------------------------------------------
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// This class is responsible of mapping items (locals, monitors, spill
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// slots and registers to their frame location
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//
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// The monitors are specified by a consecutive index, although each monitor entry
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// occupies two words. The monitor_index is 0.._num_monitors
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// The spill index is similar to local index; it is in range 0..(open)
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//
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// The CPU registers are mapped using a fixed table; register with number 0
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// is the most used one.
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// stack grow direction --> SP
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// +----------+---+----------+-------+------------------------+-----+
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// |arguments | x | monitors | spill | reserved argument area | ABI |
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// +----------+---+----------+-------+------------------------+-----+
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//
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// x = ABI area (SPARC) or return adress and link (i486)
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// ABI = ABI area (SPARC) or nothing (i486)
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class LIR_OprDesc;
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typedef LIR_OprDesc* LIR_Opr;
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class FrameMap : public CompilationResourceObj {
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public:
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enum {
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nof_cpu_regs = pd_nof_cpu_regs_frame_map,
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nof_fpu_regs = pd_nof_fpu_regs_frame_map,
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nof_cpu_regs_reg_alloc = pd_nof_cpu_regs_reg_alloc,
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nof_fpu_regs_reg_alloc = pd_nof_fpu_regs_reg_alloc,
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max_nof_caller_save_cpu_regs = pd_nof_caller_save_cpu_regs_frame_map,
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nof_caller_save_fpu_regs = pd_nof_caller_save_fpu_regs_frame_map,
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spill_slot_size_in_bytes = 4
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};
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#ifdef TARGET_ARCH_x86
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# include "c1_FrameMap_x86.hpp"
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#endif
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#ifdef TARGET_ARCH_sparc
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# include "c1_FrameMap_sparc.hpp"
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#endif
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#ifdef TARGET_ARCH_arm
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# include "c1_FrameMap_arm.hpp"
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#endif
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#ifdef TARGET_ARCH_ppc
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# include "c1_FrameMap_ppc.hpp"
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#endif
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#ifdef TARGET_ARCH_aarch64
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# include "c1_FrameMap_aarch64.hpp"
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#endif
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friend class LIR_OprDesc;
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private:
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static bool _init_done;
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static Register _cpu_rnr2reg [nof_cpu_regs];
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static int _cpu_reg2rnr [nof_cpu_regs];
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static LIR_Opr _caller_save_cpu_regs [max_nof_caller_save_cpu_regs];
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static LIR_Opr _caller_save_fpu_regs [nof_caller_save_fpu_regs];
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int _framesize;
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int _argcount;
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int _num_monitors;
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int _num_spills;
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int _reserved_argument_area_size;
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int _oop_map_arg_count;
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CallingConvention* _incoming_arguments;
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intArray* _argument_locations;
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void check_spill_index (int spill_index) const { assert(spill_index >= 0, "bad index"); }
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void check_monitor_index (int monitor_index) const { assert(monitor_index >= 0 &&
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monitor_index < _num_monitors, "bad index"); }
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static Register cpu_rnr2reg (int rnr) {
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assert(_init_done, "tables not initialized");
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debug_only(cpu_range_check(rnr);)
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return _cpu_rnr2reg[rnr];
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}
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static int cpu_reg2rnr (Register reg) {
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assert(_init_done, "tables not initialized");
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debug_only(cpu_range_check(reg->encoding());)
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return _cpu_reg2rnr[reg->encoding()];
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}
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static void map_register(int rnr, Register reg) {
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debug_only(cpu_range_check(rnr);)
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debug_only(cpu_range_check(reg->encoding());)
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_cpu_rnr2reg[rnr] = reg;
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_cpu_reg2rnr[reg->encoding()] = rnr;
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}
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void update_reserved_argument_area_size (int size) {
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assert(size >= 0, "check");
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_reserved_argument_area_size = MAX2(_reserved_argument_area_size, size);
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}
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protected:
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#ifndef PRODUCT
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static void cpu_range_check (int rnr) { assert(0 <= rnr && rnr < nof_cpu_regs, "cpu register number is too big"); }
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static void fpu_range_check (int rnr) { assert(0 <= rnr && rnr < nof_fpu_regs, "fpu register number is too big"); }
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#endif
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ByteSize sp_offset_for_monitor_base(const int idx) const;
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Address make_new_address(ByteSize sp_offset) const;
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ByteSize sp_offset_for_slot(const int idx) const;
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ByteSize sp_offset_for_double_slot(const int idx) const;
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ByteSize sp_offset_for_spill(const int idx) const;
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ByteSize sp_offset_for_monitor_lock(int monitor_index) const;
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ByteSize sp_offset_for_monitor_object(int monitor_index) const;
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VMReg sp_offset2vmreg(ByteSize offset) const;
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// platform dependent hook used to check that frame is properly
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// addressable on the platform. Used by sparc to verify that all
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// stack addresses are expressable in a simm13.
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bool validate_frame();
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static LIR_Opr map_to_opr(BasicType type, VMRegPair* reg, bool incoming);
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public:
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// Opr representing the stack_pointer on this platform
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static LIR_Opr stack_pointer();
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// JSR 292
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static LIR_Opr method_handle_invoke_SP_save_opr();
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static BasicTypeArray* signature_type_array_for(const ciMethod* method);
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// for outgoing calls, these also update the reserved area to
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// include space for arguments and any ABI area.
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CallingConvention* c_calling_convention(const BasicTypeArray* signature);
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CallingConvention* java_calling_convention(const BasicTypeArray* signature, bool outgoing);
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// deopt support
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ByteSize sp_offset_for_orig_pc() { return sp_offset_for_monitor_base(_num_monitors); }
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static LIR_Opr as_opr(Register r) {
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return LIR_OprFact::single_cpu(cpu_reg2rnr(r));
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}
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static LIR_Opr as_oop_opr(Register r) {
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return LIR_OprFact::single_cpu_oop(cpu_reg2rnr(r));
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}
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static LIR_Opr as_metadata_opr(Register r) {
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return LIR_OprFact::single_cpu_metadata(cpu_reg2rnr(r));
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}
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FrameMap(ciMethod* method, int monitors, int reserved_argument_area_size);
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bool finalize_frame(int nof_slots);
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int reserved_argument_area_size () const { return _reserved_argument_area_size; }
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int framesize () const { assert(_framesize != -1, "hasn't been calculated"); return _framesize; }
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ByteSize framesize_in_bytes () const { return in_ByteSize(framesize() * 4); }
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int num_monitors () const { return _num_monitors; }
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int num_spills () const { assert(_num_spills >= 0, "not set"); return _num_spills; }
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int argcount () const { assert(_argcount >= 0, "not set"); return _argcount; }
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int oop_map_arg_count() const { return _oop_map_arg_count; }
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CallingConvention* incoming_arguments() const { return _incoming_arguments; }
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// convenience routines
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Address address_for_slot(int index, int sp_adjust = 0) const {
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return make_new_address(sp_offset_for_slot(index) + in_ByteSize(sp_adjust));
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}
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Address address_for_double_slot(int index, int sp_adjust = 0) const {
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return make_new_address(sp_offset_for_double_slot(index) + in_ByteSize(sp_adjust));
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}
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Address address_for_monitor_lock(int monitor_index) const {
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return make_new_address(sp_offset_for_monitor_lock(monitor_index));
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}
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Address address_for_monitor_object(int monitor_index) const {
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return make_new_address(sp_offset_for_monitor_object(monitor_index));
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}
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// Creates Location describing desired slot and returns it via pointer
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// to Location object. Returns true if the stack frame offset was legal
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// (as defined by Location::legal_offset_in_bytes()), false otherwise.
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// Do not use the returned location if this returns false.
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bool location_for_sp_offset(ByteSize byte_offset_from_sp,
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Location::Type loc_type, Location* loc) const;
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bool location_for_monitor_lock (int monitor_index, Location* loc) const {
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return location_for_sp_offset(sp_offset_for_monitor_lock(monitor_index), Location::normal, loc);
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}
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bool location_for_monitor_object(int monitor_index, Location* loc) const {
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return location_for_sp_offset(sp_offset_for_monitor_object(monitor_index), Location::oop, loc);
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}
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bool locations_for_slot (int index, Location::Type loc_type,
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Location* loc, Location* second = NULL) const;
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VMReg slot_regname(int index) const {
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return sp_offset2vmreg(sp_offset_for_slot(index));
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}
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VMReg monitor_object_regname(int monitor_index) const {
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return sp_offset2vmreg(sp_offset_for_monitor_object(monitor_index));
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}
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VMReg regname(LIR_Opr opr) const;
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static LIR_Opr caller_save_cpu_reg_at(int i) {
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assert(i >= 0 && i < max_nof_caller_save_cpu_regs, "out of bounds");
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return _caller_save_cpu_regs[i];
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}
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static LIR_Opr caller_save_fpu_reg_at(int i) {
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assert(i >= 0 && i < nof_caller_save_fpu_regs, "out of bounds");
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return _caller_save_fpu_regs[i];
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}
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static void initialize();
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};
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// CallingConvention
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//--------------------------------------------------------
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class CallingConvention: public ResourceObj {
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private:
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LIR_OprList* _args;
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int _reserved_stack_slots;
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public:
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CallingConvention (LIR_OprList* args, int reserved_stack_slots)
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: _args(args)
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, _reserved_stack_slots(reserved_stack_slots) {}
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LIR_OprList* args() { return _args; }
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LIR_Opr at(int i) const { return _args->at(i); }
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int length() const { return _args->length(); }
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// Indicates number of real frame slots used by arguments passed on stack.
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int reserved_stack_slots() const { return _reserved_stack_slots; }
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#ifndef PRODUCT
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void print () const {
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for (int i = 0; i < length(); i++) {
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at(i)->print();
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}
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}
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#endif // PRODUCT
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};
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#endif // SHARE_VM_C1_C1_FRAMEMAP_HPP
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