Roland Westrelin
b305cf722e
7133857: exp() and pow() should use the x87 ISA on x86
...
Use x87 instructions to implement exp() and pow() in interpreter/c1/c2.
Reviewed-by: kvn, never, twisti
2012-05-15 10:10:23 +02:00
Nils Eliasson
7b7d3507db
7152957: VM crashes with assert(false) failed: bad AD file
...
Reviewed-by: kvn, never
2012-03-12 15:28:07 -07:00
Vladimir Kozlov
867f3ba889
7145346: VerifyStackAtCalls is broken
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Replace call_epilog() encoding with macroassembler use. Moved duplicated code to x86.ad. Fixed return_addr() definition.
Reviewed-by: never
2012-02-16 17:12:49 -08:00
Vladimir Kozlov
539616f85a
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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For C2 moved saving EBP after ESP adjustment. For C1 generated 5 byte nop instruction first if needed.
Reviewed-by: never, twisti, azeemj
2012-02-15 21:37:49 -08:00
Vladimir Kozlov
94927c382b
7125896: Eliminate nested locks
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Nested locks elimination done before lock nodes expansion by looking for outer locks of the same object.
Reviewed-by: never, twisti
2012-01-07 13:26:43 -08:00
Roland Westrelin
97439fb4ff
7121140: Allocation paths require explicit memory synchronization operations for RMO systems
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Adds store store barrier after initialization of header and body of objects.
Reviewed-by: never, kvn
2011-12-20 16:56:50 +01:00
Vladimir Kozlov
dc542c9909
7121648: Use 3-operands SIMD instructions on x86 with AVX
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Use 3-operands SIMD instructions in C2 generated code for machines with AVX.
Reviewed-by: never
2011-12-20 00:55:02 -08:00
Vladimir Kozlov
b7f5d60a7e
7116452: Add support for AVX instructions
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Added support for AVX extension to the x86 instruction set.
Reviewed-by: never
2011-12-14 14:54:38 -08:00
Roland Westrelin
07d9df5a7f
7090968: Allow adlc register class to depend on runtime conditions
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Allow reg_class definition as a function.
Reviewed-by: kvn, never
2011-11-22 09:45:57 +01:00
Christian Thalinger
81c085a1e2
7003454: order constants in constant table by number of references in code
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Reviewed-by: kvn, never, bdelsart
2011-11-16 01:39:50 -08:00
Vladimir Kozlov
669fa7396d
7097546: Optimize use of CMOVE instructions
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Avoid CMove in a loop if possible. May generate CMove if it could be moved outside a loop.
Reviewed-by: never
2011-10-26 06:08:56 -07:00
Vladimir Kozlov
90651b2666
7079329: Adjust allocation prefetching for T4
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On T4 2 BIS instructions should be issued to prefetch 64 bytes
Reviewed-by: iveresov, phh, twisti
2011-08-16 16:59:46 -07:00
Vladimir Kozlov
ac99f413d7
7063629: use cbcond in C2 generated code on T4
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Use new short branch instruction in C2 generated code.
Reviewed-by: never
2011-08-11 12:08:11 -07:00
Roland Westrelin
b543a07b9a
7074017: Introduce MemBarAcquireLock/MemBarReleaseLock nodes for monitor enter/exit code paths
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Replace MemBarAcquire/MemBarRelease nodes on the monitor enter/exit code paths with new MemBarAcquireLock/MemBarReleaseLock nodes
Reviewed-by: kvn, twisti
2011-08-02 18:36:40 +02:00
Vladimir Kozlov
18329266ea
7069452: Cleanup NodeFlags
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Remove flags which duplicate information in Node::NodeClasses.
Reviewed-by: never
2011-07-27 17:28:36 -07:00
Vladimir Kozlov
48c1293916
7063628: Use cbcond on T4
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Add new short branch instruction to Hotspot sparc assembler.
Reviewed-by: never, twisti, jrose
2011-07-21 11:25:07 -07:00
Vladimir Kozlov
1ac79543d0
5091921: Sign flip issues in loop optimizer
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Fix integer overflow problem in the code generated by loop optimizer.
Reviewed-by: never
2011-05-04 13:12:42 -07:00
Tom Deneau
899faa3fec
7035713: 3DNow Prefetch Instruction Support
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The upcoming processors from AMD are the first that support 3dnow prefetch without supporting the 3dnow instruction set.
Reviewed-by: kvn
2011-04-11 15:30:31 -07:00
Roland Westrelin
4171ca786e
7029017: Additional architecture support for c2 compiler
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Enables cross building of a c2 VM. Support masking of shift counts when the processor architecture mandates it.
Reviewed-by: kvn, never
2011-03-25 09:35:39 +01:00
Vladimir Kozlov
a74bc73598
6942326: x86 code in string_indexof() could read beyond reserved heap space
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Copy small (<8) strings on stack if str+16 crosses a page boundary and load from stack into XMM. Back up pointer when loading string's tail.
Reviewed-by: never
2011-02-26 12:10:54 -08:00
Tom Rodriguez
4b3ada699d
7016474: string compare intrinsic improvements
...
Reviewed-by: kvn
2011-02-09 15:02:23 -08:00
Christian Thalinger
ffaadcecea
6961690: load oops from constant table on SPARC
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Oops should be loaded from the constant table of an nmethod instead of materializing them with a long code sequence.
Reviewed-by: never, kvn
2010-12-03 01:34:31 -08:00
Vladimir Kozlov
ce2df719c6
6997311: SIGFPE in new long division asm code
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Use unsigned DIV instruction
Reviewed-by: never
2010-11-06 18:52:07 -07:00
Vladimir Kozlov
249b1f6c4f
6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14
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Use hardware DIV instruction for long division by constant when it is faster than code with multiply.
Reviewed-by: never
2010-11-02 09:00:37 -07:00
Christian Thalinger
a4b2fe3b1c
6978355: renaming for 6961697
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This is the renaming part of 6961697 to keep the actual changes small for review.
Reviewed-by: kvn, never
2010-08-25 05:27:54 -07:00
Tom Rodriguez
a54b1ff70e
6978249: spill between cpu and fpu registers when those moves are fast
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Reviewed-by: kvn
2010-08-19 14:51:47 -07:00
John R Rose
d6a9b93b5a
Merge
2010-06-02 22:45:42 -07:00
Vladimir Kozlov
a3005a16fc
6954029: Improve implicit null check generation with compressed oops
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Hoist DecodeN instruction above null check
Reviewed-by: never, twisti
2010-06-02 09:49:32 -07:00
Erik Trimble
ba7c173659
6941466: Oracle rebranding changes for Hotspot repositories
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Change all the Sun copyrights to Oracle copyright
Reviewed-by: ohair
2010-05-27 19:08:38 -07:00
Christian Thalinger
7a9f2e7625
6934104: JSR 292 needs to support SPARC C2
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C2 for SPARC needs to support JSR 292.
Reviewed-by: kvn, never
2010-05-25 02:38:48 -07:00
Hiroshi Yamauchi
cd48f31efe
6946040: add intrinsic for short and char reverseBytes
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Reviewed-by: never, twisti
2010-04-26 11:27:21 -07:00
Vladimir Kozlov
fa2d360cd5
6910664: C2: java/util/Arrays/Sorting.java fails with DeoptimizeALot flag
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Matcher::float_in_double should be true only when FPU is used for floats.
Reviewed-by: never, twisti
2010-02-19 10:04:16 -08:00
Hiroshi Yamauchi
688398edef
6921969: optimize 64 long multiply for case with high bits zero
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Reviewed-by: never, twisti, kvn, rasbold
2010-02-03 15:56:37 -08:00
Christian Thalinger
375527d84e
6829187: compiler optimizations required for JSR 292
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C2 implementation for invokedynamic support.
Reviewed-by: kvn, never
2010-01-05 13:05:58 +01:00
John R Rose
e261aecad8
6863023: need non-perm oops in code cache for JSR 292
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Make a special root-list for those few nmethods which might contain non-perm oops.
Reviewed-by: twisti, kvn, never, jmasa, ysr
2009-09-15 21:53:47 -07:00
Vladimir Kozlov
243514d483
6827605: new String intrinsics may prevent EA scalar replacement
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6875866: Intrinsic for String.indexOf() is broken on x86 with SSE4.2
Modify String intrinsic methods to pass char[] pointers instead of string oops.
Reviewed-by: never
2009-09-14 12:14:20 -07:00
Christian Thalinger
a9ad90fa87
5057225: Remove useless I2L conversions
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The optimizer should be told to normalize (AndL (ConvI2L x) 0xFF) to (ConvI2L (AndI x 0xFF)), and then the existing matcher rule will work for free.
Reviewed-by: kvn
2009-06-26 07:26:10 -07:00
Christian Thalinger
8a262ce04b
6814842: Load shortening optimizations
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6797305 handles load widening but no shortening which should be covered here.
Reviewed-by: never, kvn
2009-05-13 00:45:22 -07:00
Christian Thalinger
6a270f9f19
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
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These methods can be instrinsified by using bit scan, bit test, and population count instructions.
Reviewed-by: kvn, never
2009-05-06 00:27:52 -07:00
Changpeng Fang
c0d62ad9e6
6761600: Use sse 4.2 in intrinsics
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Use SSE 4.2 in intrinsics for String.{compareTo/equals/indexOf} and Arrays.equals.
Reviewed-by: kvn, never, jrose
2009-03-31 14:07:08 -07:00
Tom Rodriguez
134debb0ba
6822204: volatile fences should prefer lock:addl to actual mfence instructions
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Reviewed-by: kvn, phh
2009-03-26 14:31:45 -07:00
John R Rose
b8dbe8d8f6
6813212: factor duplicated assembly code for general subclass check (for 6655638)
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Code in interp_masm, stubGenerator, c1_LIRAssembler, and AD files moved into MacroAssembler.
Reviewed-by: kvn
2009-03-13 18:39:22 -07:00
Christian Thalinger
de67e52949
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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BitCount() should use POPC on SPARC processors where POPC is implemented directly in hardware.
Reviewed-by: kvn, never
2009-03-13 11:35:17 -07:00
Christian Thalinger
89cea91c48
6797305: Add LoadUB and LoadUI opcode class
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Add a LoadUB (unsigned byte) and LoadUI (unsigned int) opcode class so we have these load optimizations in the first place and do not need to handle them in the matcher.
Reviewed-by: never, kvn
2009-03-09 03:17:11 -07:00
John R Rose
07321dec65
6812678: macro assembler needs delayed binding of a few constants (for 6655638)
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Minor assembler enhancements preparing for method handles
Reviewed-by: kvn
2009-03-04 09:58:39 -08:00
Christian Thalinger
05d1de7727
6810672: Comment typos
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I have collected some typos I have found while looking at the code.
Reviewed-by: kvn, never
2009-02-27 13:27:09 -08:00
Vladimir Kozlov
681eb89b31
Merge
2009-02-17 14:30:24 -08:00
Christian Thalinger
3b8452da93
6796746: rename LoadC (char) opcode class to LoadUS (unsigned short)
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Renaming LoadC to LoadUS would round up the planned introduction of LoadUB and LoadUI.
Reviewed-by: phh, kvn
2009-01-26 16:22:12 +01:00
Xiaobin Lu
1362b9fd1d
6787106: Hotspot 32 bit build fails on platforms having different definitions for intptr_t & int32_t
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Avoid casting between int32_t and intptr_t specifically for MasmAssembler::movptr in 32 bit platforms.
Reviewed-by: jrose, kvn
2008-12-24 13:06:09 -08:00
Vladimir Kozlov
7aae40a95f
6462850: generate biased locking code in C2 ideal graph
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Inline biased locking code in C2 ideal graph during macro nodes expansion
Reviewed-by: never
2008-11-07 09:29:38 -08:00